Method for forming a multilayer wiring of a semiconductor device

  • US 5,252,177 A
  • Filed: 07/29/1991
  • Issued: 10/12/1993
  • Est. Priority Date: 04/15/1991
  • Status: Expired due to Term
First Claim
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1. A method for forming multilayer wiring in a semiconductor device, said semiconductor device comprising a semiconductor substrate and insulation layers and conductive layers formed over a top surface of said semiconductor substrate, said method comprising the steps of:

  • forming a contact hole by selectively etching out a region of an insulation layer disposed on a first conductive layer using a photoresist pattern to thereby expose a top surface of said first conductive layer;

    removing said photoresist pattern positioned on said insulation layer by plasma etching simultaneously forming a protective oxide layer on the exposed top surface of said first conductive layer; and

    removing said oxide layer before forming a second conductive layer on said exposed top surface of said first conductive layer.

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