Multiple microcontroller hard disk drive control architecture

• US 5,261,058 A
• Filed: 03/05/1993
• Issued: 11/09/1993
• Est. Priority Date: 11/09/1990
• Status: Expired due to Term

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: Conner Peripherals Incorporated (Whitehouse Group Ltd.)
• Inventors: Keeler, Stanton M., Sander, Charles M., Squires, John P., Clay, Donald W.
• Primary Examiner(s): CHUN, DEBRA
• Application Number:
  US08/027,614
• Time in Patent Office: 249 Days
• Field of Search: 395/250, 395/275, 395/425, 395/725, 360/69, 360/98
• US Class Current: 710/1
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0673 Single storage device

Abstract

A disk drive architecture controls the transfer of data between a host processor interface and a recording media that includes one or more disk surfaces for storing data. A low-level data controller controls the transfer of data between the disk surfaces and a data buffer. An interface controller controls the transfer of data between the host interface and the data buffer. An arbiter and buffer controller, responsive to data transfer requests from the low-level and interface controllers, arbitrates data storage and retrieval accesses of the data buffer. The low-level and interface controllers operate substantially independent of one another in performing their respective control operations. Consequently, data is transferred bi-directionally through the data buffer at the optimum timing for both controllers.

Claims

1. A multicontroller architecture for controlling the transfer of data and control signals between a host processor, via a host interface, and storage media comprising:

a plurality of low level controllers wherein each said low level controller, independently from any other said low level controller, controls the recording and retrieving of said data to and from said storage media;

an interface controller connected to said host interface and each said low level controller for communicating with said host processor via said host interface, for controlling the data paths to and from said host interface and said storage media, and for generating and communicating parameters to said low level controllers for defining the operation to be performed by said low level controllers whereby thereinafter said low level controller can perform said operation independently of said interface controller; and

wherein each of said low level controller comprises a first means for storing data received from said interface controller and from said storage media and a second means connected to said first means for controlling the flow of data between said first means, said interface controller and said storage media.

2. The multicontroller architecture of claim 1 wherein each said second means comprises;

a third means for arbitrating access to said first means between said interface controller and low level controller.

3. A multicontroller architecture as set forth in claim 1 or 2 wherein said interface controller further comprises;

a fourth means for storing data; and

a fifth means for memory mapping the location of data in said storage media, in said first means associated with each of said low level controllers and in said fourth means.

4. The multicontroller architecture of claim 3 wherein said storage media comprises;

a common storage media common to a plurality of said low level to recover for allowing each said common low level controller to recover data from said common storage media that was recorded by any common said low level controller associated with said common storage media.

5. A multicontroller architecture of claim 4 wherein said interface controller further comprises;

a sixth means for selecting one of said pluralities of low level controllers to perform a desired said operation as a function of the location of where the data is to be stored or retrieved, the availability of said low level controllers and the response time of each said low level controller for performing the desired operation.

6. A multicontroller architecture of claim 3 wherein said interface controller further comprises;

a sixth means for selecting one of said pluralities of low level controllers to perform a desired said operation as a function of the location of where the data is to be stored or retrieved, the availability of said low level controllers and the response time of each said low level controller for performing the desired operation.

7. The multicontroller architecture of claim 1 or 2 wherein said storage media comprises;

a common storage media common to a plurality of said low level controllers for allowing each said common low level controller to recover data from said common storage media that was recorded by any common said low level controller associated with said common storage media.

8. A multicontroller architecture of claim 7 wherein said interface controller further comprises;

a sixth means for selecting one of said pluralities of low level controllers to perform a desired said operation as a function of the location of where the data is to be stored or retrieved, the availability of said low level controllers and the response time of each said low level controller for performing the desired operation.

9. A multicontroller architecture of claim 1 or 2 wherein said interface controller further comprises;

a sixth means for selecting one of said pluralities of low level controllers to perform a desired said operation as a function of the location of where the data is to be stored or retrieved, the availability of said low level controllers and the response time of each said low level controller for performing the desired operation.

10. A multicontroller architecture in a disk drive system for controlling the transfer of data and control signals between a host processor, via a host interface, and said disk drive system, said disk drive system including storage media and a plurality of actuators, each said actuator carrying at least one transducer for recording data on and retrieving data from said storage media and moving said actuator'"'"'s transducers with respect to said storage media, said multicontroller architecture comprising:

a plurality of low level controllers, each said low level controller being connected to a dedicated one of said actuators where each said low level controller, independently of any other said low level controller, controls the recording of data on and the retrieving of data from any data storage location on said storage media and controls the positioning of a said transducer carried on said dedicated actuator with respect to said storage media and the maintaining the position of a said transducer carried by said dedicated actuator with respect to said storage media;

an interface controller connected to said host interface and each said low level controller for communicating with said host processor via said host interface, for controlling the data paths to and from said host interface and said low level controllers and for generating and communicating parameters to said low level controllers for defining operations to be performed by said low level controllers; and

each said low level controller performing said received operations from said interface controller independently of said interface controller.

11. The multicontroller architecture of claim 10 wherein each said low level controllers comprise:

a buffer for storing data received from said interface controller and from said storage media; and

a buffer sequencer connected to said buffer for controlling the flow of data between said buffer and said interface controller and between said buffer and said storage media.

12. The multicontroller architecture of claim 11 wherein said buffer sequencer comprises:

arbitrating means for arbitrating access to said buffer between said interface controller and said low level controller comprising said buffer.

13. A multicontroller architecture as set forth in claim 10 wherein said interface controller further comprises:

storage means for storing data received from said host for storage on said storage media and data received from said low level controllers to be sent to said host; and

mapping means for memory mapping the location of data in said storage media and in said buffer in each of said low level controllers.

14. A multicontroller architecture of claim 10 wherein said interface controller further comprises:

control means for selecting one of said pluralities of low level controllers to perform a desired said operation as a function of the location of where the data is to be stored on or retrieved from said storage media, the availability of said low level controllers, the present positions of said plurality of actuators and the response time for each said low level controller for performing the desired operation.