Data base access mechanism for rules utilized by a synthesis procedure for logic circuit design

• US 5,267,175 A
• Filed: 04/05/1993
• Issued: 11/30/1993
• Est. Priority Date: 09/12/1986
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Digital Equipment Corporation (HP Inc.)
• Inventors: Hooper, Donald F.
• Primary Examiner(s): Trans, Vincent N.
• Application Number:
  US08/042,859
• Time in Patent Office: 239 Days
• Field of Search: 364/491, 364/490, 364/489, 364/488, 395/600, 395/650
• US Class Current: 716/104
• CPC Class Codes: G06F 16/00 Information retrieval; Database structures therefor; File system structures therefor
• CPC Class Codes: G06F 30/327 Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
• CPC Class Codes: Y10S 707/99945 Object-oriented database structure processing
• CPC Class Codes: Y10S 707/99948 Application of database or data structure, e.g. distributed, multimedia, or image

Abstract

In a circuit design synthesis procedure in which the pointers are added to the data base to permit a path through the circuit to be followed, a qualified object is defined to be a data object that permits access expressed by a sequence (or chain) of access forms strung together. A mechanism is defined that permits access of any object in a logic design database relative to any other object in the data base. Access forms are strung together in a given format. This structure provides an easily understandable access form and it is defined in the rule grammar. This access form can be parsed in the synthesis procedure into a nest of (LISP) program functions, which, when evaluated, will return an object in the data base. This access chain is used in the antecedent and consequence portions of the rule structure for the purpose of modifying the target objects. This access structure permits the synthesis rules to make decisions on such parameters as timing, cell size, power, wire loading, model names, etc. The rules of the synthesis procedure can be written in such a manner as to be similar to a circuit designer'"'"'s rules. In addition to the access of objects, this chained access structure also permits tagging (or marking) a subset intermediate objects to be temporarily saved for use by the synthesis rules. This additional capability provides the ability to sort and partition sets of objects based on attributes and permits a synthesis procedure capable of using abstract tradeoffs.

Claims

1. In a data processing system, a method of synthesizing a circuit design by accessing data base objects in a data base organized as a data base structure and contained in a memory of said data processing system, said data base objects representing components of a circuit, the method comprising the steps, performed by the data processing system, of:

creating, by the data processing system and in said memory, said data base structure by coupling said data base objects contained in said data base structure to allow said data base objects to be accessed in any order;

parsing, by the data processing system, a noun which is contained in a rule stored in the memory, said noun including a sequence of connected key words that identify a traversal of the data base structure, the parsing step including the substep of

interpreting said noun as a sequence of nested functions; and

accessing, by the data processing system, the coupled data base objects contained in said data base structure in accordance with the traversal of said data base structure identified by the connected key words in said noun to perform a circuit design synthesis operation by modifying said data base structure.

2. The method of accessing a data base of claim 1 further including the step of including a name for one of said sequence of nested functions in said noun in said parsing step, said function name designating derived data as opposed to direct access data.

3. The method for accessing a data base of claim 1 wherein said noun identifies at least one of a plurality of said data base objects in said parsing step, said method further including the step of accessing said at least one data base object from said noun.

4. The method for accessing a data base of claim 3 wherein said noun identifies a plurality of sequential data base objects in said parsing step, said method further including the step of accessing said plurality of sequential data base objects identified by said noun.

5. The method of accessing a data base of claim 3 further including the step of executing a rule associated with a predetermined one of said plurality of data base objects, utilizing said predetermined data base object as an argument of said rule.

6. The method of accessing a data base of claim 5 further including the step of tagging intermediate objects of said plurality of sequential data base objects, said tagged objects capable of being accessed during said execution of said rule.

7. The method of accessing a data base of claim 4, wherein said plurality of sequential data base objects are a single path of a multi-branching circuit path and wherein other data base objects designate groups of data base objects by data base pointers, the method further including the step of branching from said single path to groups of paths by following said data base pointers to data base objects designated as said groups of data base objects.

8. The method of accessing a data base of claim 7 further including the step of selecting one path from said groups of paths by a positional indicator.

9. A data processing system, for synthesizing circuit designs, in which a data base contained in a memory of the data processing system at non-adjacent locations is accessed, the data processing system comprising:

means for creating a data base structure in said memory in which coupled data base objects contained in said data base structure can be accessed in any order, said coupled data base objects representing circuit components;

means for parsing a noun which is contained in a rule stored in the memory and which includes a sequence of connected key words that identify a traversal of the data base structure, by interpreting said noun as a sequence of nested functions; and

means for accessing the coupled data base objects contained in said data base structure in accordance with the traversal of said data base structure identified by the connected key words in said noun to perform a circuit design synthesis operation by modifying said data base structure.

10. A circuit design synthesis process performed by a data processing system including a memory containing a plurality of rules having a consequence portion and an antecedent portion and a sequence of linked data base objects representing circuit components, the process being performed by the data processing system and comprising the steps, performed by the data processing system, of:

determining, by the data processing system, whether the antecedent portion of a first one of the rules applied to a first one of the data base objects is true by performing a plurality of tests contained within the antecedent portion of the first rule, the antecedent portion of the first rule being true when each of the performed tests yields a result of true, and the performing of the plurality of tests including;

performing, by the data processing system, a first one of the tests by evaluating an end point in the sequence of data base objects which was accessed from the first data base object and

performing, by the data processing system, a second one of the tests by evaluating the end point in the sequence of data base objects which was accessed from an intermediate point in the sequence of data base objects, the intermediate point being determined based on a result of the first test and located between the first data base object and the end point; and

when the antecedent portion of the first rule is true, thereafter performing, by the data processing system, the consequence portion of the first rule.

11. The process according to claim 10, wherein:

the performing of the first one of the tests includes stepping from object to object along at least one access path in the sequence of data base objects starting from the first data base object and progressing to the end point in the at least one access path, and evaluating the end point of the at least one access path to determine whether the first one of the tests is true for the end point; and

the performing of the second one of the tests includes stepping from object to object along the at least one access path in the sequence of data base objects starting from the intermediate point in the at least one access path and progressing to the end point in the at least one access path, the intermediate point being determined based on a result of the first test and located between the first data base object and the end point, and evaluating the end point of the at least one access path to determine whether the second one of the tests is true for the end point.

12. The process according to claim 11, wherein the antecedent portion of the first rule includes a selected name for identifying the intermediate point in the at least one access path after the first test is performed.

13. The process according to claim 12, wherein the at least one access path includes a plurality of access paths and the selected name identifies a plurality of the intermediate points in the plurality of access paths.

14. A data processing system for performing a circuit design synthesis process, the data processing system having a memory in which a plurality of rules and a sequence of linked data base objects are stored and each of the rules having a consequence portion and an antecedent portion, the system comprising:

means for determining whether the antecedent portion of a first one of the rules applied to a first one of the data base objects is true by performing a plurality of tests contained within the antecedent portion of the first rule, the antecedent portion of the first rule being true when each of the performed tests yields a result of true, the determining means including;

means for performing a first one of the tests by evaluating an end portion in the sequence of data base objects which was accessed from the first data base object and

means for performing a second one of the tests by evaluating the end point in the sequence of data base objects which was accessed from an intermediate point in the sequence of data base objects, the intermediate point being determined based on a result of the first test and located between the first data base object and the end point; and

means for performing the consequence portion of the first rule when the antecedent portion of the first rule is true.

15. The system according to claim 14, wherein the determining means includes:

means for performing the first one of the tests by stepping from object to object along at least one access path in the sequence of data base objects starting from the first data base object and progressing to the end point in the at least one access path, and evaluating the end point of the at least one access path to determine whether the first one of the tests is true for the end point; and

means for performing the second one of the tests by stepping from object to object along the at least one access path in the sequence of data base objects starting from the intermediate point in the at least one access path and progressing to the end point in the at least one access path, the intermediate point being determined based on a result of the first test and located between the first data base object and the end point, and evaluating the end point of the at least one access path to determine whether the second one of the tests is true for the end point.

16. The system according to claim 15, wherein the antecedent portion of the first rule includes a selected name for identifying the intermediate point in the at least one access path after the first test is performed.

17. The system according to claim 16, wherein the at least one access path includes a plurality of access paths and the selected name identifies a plurality of the intermediate points in the plurality of access paths.