Self-adjusting recovery algorithm for a microprocessor-controlled setback thermostat
First Claim
1. A setback thermostat including a temperature sensor providing a signal indicative of the ambient temperature, and a programmable digital processor including an operand memory having a plurality of data storage locations at least one of which contains an occupancy time value and an associated occupancy temperature value and another which contains a ramp rate value, an input channel receiving the temperature sensor signal, and an output channel providing an operation signal to start operation of a space temperature control unit responsive to a predetermined internal condition of the processor, said processor periodically converting the temperature sensor signal to a digital current temperature value and storing the current temperature value in an operand memory location, said processor further having a closing maintaining in an operand memory location a present time value specifying the present time of day, and said processor also including an instruction memory in which is stored a sequence of instructions, and from which instructions in the sequence are retrieved and executed by the processor, said processor during execution of said sequence of instructions comprising:
- a) time difference means for retrieving the occupancy time value and the present time value from their respective operand memory locations, for generating a time difference value equal to the difference between the occupancy time and the present time values and for storing the time difference value in an operand memory location;
b) ramp delta means for retrieving from their respective operand memory locations the time difference value and the ramp rate value, for generating a ramp delta value equal to the product of the time difference value and the ramp rate value, and for storing the ramp delta value in an operand memory location; and
c) ramp set point means for retrieving the occupancy temperature value and the ramp delta value from their respective operand memory locations, for forming a ramp set point value equal to at least one of i) the difference between the occupancy temperature value and the ramp delta value and ii) the sum of the occupancy temperature value and the ramp delta value, and for comparing the ramp set point value with the current temperature value, wherein the predetermined interval processor condition comprises a predetermined magnitude relationship between the ramp set point value and the current temperature value, and when the predetermined internal processor condition exists, issuing the operation signal.
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Accused Products
Abstract
A recovery algorithm for a setback thermostat uses the intersection of the space temperature with a sloped recovery temperature line which approximates the change in temperature as a function of time during recovery of the temperature controlled space from a setback temperature, to determine the time at which recovery to the occupancy temperature should begin. The thermostat starts recovery when the current space temperature crosses the recovery temperature line. A useful feature of the apparatus and method which implement the invention, computes and constantly updates the slope of the recovery temperature line. The update of the recovery temperature line slope is based on miss time, i.e., the time between actually achieving the desired next set point temperature and the next set point time associated with the next set point temperature. If the heating or cooling load on the space changes, the recovery temperature will frequently cross the recovery temperature line at a different time, causing recovery to start at a time more compatible with the current heating or cooling load in order to complete recovery at or near the desired time.
132 Citations
18 Claims
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1. A setback thermostat including a temperature sensor providing a signal indicative of the ambient temperature, and a programmable digital processor including an operand memory having a plurality of data storage locations at least one of which contains an occupancy time value and an associated occupancy temperature value and another which contains a ramp rate value, an input channel receiving the temperature sensor signal, and an output channel providing an operation signal to start operation of a space temperature control unit responsive to a predetermined internal condition of the processor, said processor periodically converting the temperature sensor signal to a digital current temperature value and storing the current temperature value in an operand memory location, said processor further having a closing maintaining in an operand memory location a present time value specifying the present time of day, and said processor also including an instruction memory in which is stored a sequence of instructions, and from which instructions in the sequence are retrieved and executed by the processor, said processor during execution of said sequence of instructions comprising:
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a) time difference means for retrieving the occupancy time value and the present time value from their respective operand memory locations, for generating a time difference value equal to the difference between the occupancy time and the present time values and for storing the time difference value in an operand memory location; b) ramp delta means for retrieving from their respective operand memory locations the time difference value and the ramp rate value, for generating a ramp delta value equal to the product of the time difference value and the ramp rate value, and for storing the ramp delta value in an operand memory location; and c) ramp set point means for retrieving the occupancy temperature value and the ramp delta value from their respective operand memory locations, for forming a ramp set point value equal to at least one of i) the difference between the occupancy temperature value and the ramp delta value and ii) the sum of the occupancy temperature value and the ramp delta value, and for comparing the ramp set point value with the current temperature value, wherein the predetermined interval processor condition comprises a predetermined magnitude relationship between the ramp set point value and the current temperature value, and when the predetermined internal processor condition exists, issuing the operation signal. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A processor-implemented method for a setback temperature mode of operation in a thermostat, said processor including an operand memory and an output channel providing an operation signal for initiating operation of a space temperature control unit, the method comprising the steps of:
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a) recording in the operand memory, current values of the space temperature; b) recording in the operand memory, at least one occupancy temperature and one occupancy time which follows a setback temperature interval; c) recording in the operand memory the present time of day; d) recording in the operand memory a ramp rate value; e) at the end of intervals of predetermined length, calculating a time difference value equal to the difference between the occupancy time and the present time and recording the time difference value in the operand memory; f) then, after a time difference value has been recorded, calculating and recording in the operand memory a ramp delta value equal to the product of the latest time difference value recorded and the ramp rate value; g) then calculating and recording in the operand memory a ramp set point value equal to at least one of the difference between the occupancy temperature value and the ramp delta value and the sum of the occupancy temperature value and the ramp delta value; and h) then comparing the ramp set point value with the current temperature value, and when a selectable relationship between the ramp set point value and the current temperature value exists, issuing the operation signal. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A setback thermostat including a temperature sensor providing a signal indicative of the ambient temperature, and a digital processor including an operand memory having a plurality of data storage locations, at least one of which contains an occupancy time value and an associated occupancy temperature value and another which contains a ramp rate value, an input channel receiving the temperature sensor signal, and an output channel providing an operation signal to start operation of a space temperature control unit responsive to a predetermined internal condition of the processor, said processor periodically converting the temperature sensors signal to a digital current temperature value and storing the current temperature value in an operand memory location, said processor further having a clock maintaining in an operand memory location a present time value specifying the present time of day, said processor comprising:
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a) time difference means for retrieving the occupancy time value and the present time value from their respective operand memory locations, for generating a time difference value equal to the difference between the occupancy time and the present time values and for storing the time difference value in an operand memory location; b) ramp delta means for retrieving from their respective operand memory locations the time difference value and the ramp rate value, for generating a ramp delta value equal to the product of the time difference value and the ramp rate value, and for storing the ramp delta value in an operand memory location; and c) ramp set point means for retrieving the occupancy temperature value and the ramp delta value from their respective operand memory locations, for forming a ramp set point value equal to at least one of i) the difference between the occupancy temperature value and the ramp delta value and ii) the sum of the occupancy temperature value and the ramp delta value, and for comparing the ramp set point value with the current temperature value, wherein the predetermined internal processor condition comprises a predetermined magnitude relationship between the ramp set point value and the current temperature value, and when the predetermined internal processor condition exists, issuing the operation signal. - View Dependent Claims (14, 15, 16, 17, 18)
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Specification