Color television window for a video display unit

• US 5,283,561 A
• Filed: 12/22/1992
• Issued: 02/01/1994
• Est. Priority Date: 02/24/1989
• Status: Expired due to Term

• Current Assignee: MediaTek, Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: McCabe, Daniel H., Lumelsky, Leon, Peevers, Alan W.
• Primary Examiner(s): Weldon, Ulysses
• Assistant Examiner(s): FATAHI YAR, MAHMOUD
• Application Number:
  US07/999,182
• Time in Patent Office: 406 Days
• Field of Search: 340/701, 340/702, 340/703, 340/721, 340/723, 340/731, 340/747, 358/11, 358/22, 358/903, 395/154
• US Class Current: 715/717
• CPC Class Codes: G09G 2340/125 wherein one of the images is motion video
• CPC Class Codes: G09G 5/14 Display of multiple viewports
• CPC Class Codes: G09G 5/391 Resolution modifying circuits, e.g. variable screen formats
• CPC Class Codes: H04N 9/641 Multi-purpose receivers, e.g. for auxiliary information H04N9/642 takes precedence

Abstract

A circuit for interfacing between a digital-television circuit for producing pixel data for television images and a computer graphics display permits rapid scaling and positioning of live television images on the graphics display. In a preferred embodiment, the digital-television/computer-graphics interface circuit of the invention includes memory for storing a horizontal-scaling bit pattern and a vertical-scaling bit pattern. Such a preferred interface circuit is adapted to receive digital-television pixel data from the digital television circuit and, on a pixel-by-pixel basis depending on the state of corresponding bits in the horizontal-scaling bit pattern, to skip the pixel in the case of image contraction and to replicate the pixel in the case of image expansion. The preferred interface circuit is also adapted to receive digital-television pixel data on a television-line by television-line basis and, depending on the state of a corresponding bit of the vertical-scaling bit pattern, to skip the entire line of pixel data in the case of image contraction or to replicate the line in the case of image expansion. The interface circuit may include a hardware vector generator for generating scaling bit patterns in accordance with a procedure analogous to a vector-drawing procedure used in graphics displays, such as the "Bresenham procedure."

Claims

1. A digital television/graphics display interface for receiving digitally-encoded luminance samples and chrominance samples representing a live color television signal from a digital television decoder at a predetermined first number of television lines per frame and a second number of luminance samples per television line and storing selected ones of the luminance samples and the chrominance samples in predetermined memory locations in a frame buffer for display in a window image in a graphics display, the window image having a third number of rows of pixels and a fourth number of pixels per row, the third number of rows of pixels in the window image being different from the first number of television lines per frame and the fourth number of pixels per row being different from the second number of luminance samples per television line, the interface comprising:

(a) a luminance first-in-first-out device connected to a luminance sample output of the digital television decoder for storing selected ones of the luminance samples from the digital television decoder and to a luminance-sample input of the frame buffer of the graphics display;

(b) a chrominance first-in-first-out device connected to a chrominance sample output of the digital television decoder for receiving chrominance samples from the digital television decoder and to a chrominance-sample input of the frame buffer of the graphics display;

(c) horizontal window control means connected to control input means of the luminance first-in-first-out device and to control input means of the chrominance first-in-first-out device for controllably enabling the storage of individual ones of the luminance samples in the luminance first-in-first-out device and for controllably enabling the reading of individual ones of the luminance samples from the luminance first-in-first-out device and for controllably enabling the storing of individual ones of the chrominance samples into the chrominance first-in-first-out device and for controllably enabling the reading of individual ones of the chrominance samples from the chrominance first-in-first-out device, the horizontal window control means including a horizontal image-contraction control-pattern memory for storing a binary horizontal image-contraction control pattern, the number of bits in the horizontal image-contraction control pattern being at least as great as the second number of luminance samples in a television line, the horizontal window controller being adapted to enable or disable the storing of individual ones of corresponding luminance and chrominance sample in the luminance and chrominance first-in-first-out devices, respectively, in accordance with the state of corresponding individual bits in the horizontal image-contraction control pattern stored in the horizontal image-contraction control-pattern memory;

(d) vertical window control means for controllably enabling the storage of sample from individual ones of the television lines, the vertical window control means including a vertical image-contraction control-pattern memory for storing a binary vertical image-contraction control pattern, the number of bits in the vertical image-contraction control pattern being at least as great as the first number of television lines, the vertical window control means being adapted to enable or disable the storing of samples from individual ones of the television lines in accordance with the state of corresponding individual bits in the vertical image-contraction control pattern stored in the vertical image-contraction control-pattern memory; and

(e) computation means connected to the horizontal window control means and to the vertical window control means for generating a horizontal image-contraction control pattern for storage in the horizontal image-contraction control-pattern memory of the horizontal window control means, and a vertical image-contraction control pattern for storage in the vertical image-contraction control-pattern memory of the vertical window control means, the computation means being adapted to calculate the horizontal and vertical image-contraction control patterns independently of one another by stepwise altering a cross-multiplication error term towards zero, an initial error term being varied from pattern to pattern to introduce a variation in the patterns.

2. A digital-television/graphics-display interface circuit for receiving digitally-encoded luminance samples and chrominance samples representing a color-television signal for a live color-television image from a digital-television decoder at a predetermined lines-per-frame number of television lines per frame and a predetermined samples-per-line number of luminance samples per full-length television line and transmitting selected ones of the luminance samples and the chrominance samples to a frame buffer for storage in destination-window-area memory locations, which memory locations are associated with a destination-window area of a graphics display, for display as a source-window portion of the live color-television image in the destination-window area of the graphics display, the destination-window area having a selectable destination-window-height number of rows of pixels and a selectable destination-window-width number of pixels per row, the source-window portion of the color-television image having a selectable source-window-height number of television lines in the source-window portion and a source-window-width number of luminance samples in a television line in the source-window portion, the destination-window-height number of rows of pixels in the destination window area being different from the source-window-height number of television lines in the source-window portion and the destination-window-width number of pixels per row in the destination-window area being different from the source-window-width number of luminance samples in the television line in the source-window portion, the interface circuit comprising:

(a) a luminance first-in-first-out device having a luminance-sample input, a luminance-sample output, a luminance-shift-in-control-signal input, and a luminance-shift-out-control-signal input, the luminance-sample input of the luminance first-in-first-out device being connectable to a luminance-sample output of the digital-television decoder for controllably shifting in selected ones of the luminance samples received from the digital-television decoder in response to shift-in-control-signals applied to the luminance shift-in-control-signal input, and the luminance-sample output being connectable to a luminance-sample input of the frame buffer of the graphics display for controllably shifting out luminance samples for transmitting to the frame buffer in response to shift-out-control signals applied to the luminance shift-out-control-signal output;

(b) a chrominance first-in-first-out device having a chrominance-sample input, a chrominance-sample output, a chrominance shift-in-control signal input, and a chrominance shift-out-control signal input, the chrominance-sample input of the chrominance first-in-first-out device being connectable to a chrominance-sample output of the digital-television decoder for controllably shifting in chrominance samples received from the digital-television decoder in response to chrominance shift-in-control-signals applied to the chrominance shift-in-control-signal input, and the chrominance-sample output being connectable to a chrominance-sample input of the frame buffer of the graphics display for controllably shifting out chrominance samples for transmission to the frame buffer in response to chrominance shift-out-control signals applied to the shift-out-control-signal output;

(c) horizontal window control means connected to the luminance shift-in-control-signal input and the luminance shift-out-control-signal input of the luminance first-in-first-out device and to the chrominance shift-in-control-signal input and the chrominance shift-out-control-signal input of the chrominance first-in-first-out device for controllably enabling the shifting of individual ones of the luminance samples into and out of the luminance first-in-first-out device and for controllably enabling the shifting of individual ones of the chrominance samples into and out of the chrominance first-in-first-out device, the horizontal window control means including a horizontal image-contraction control-pattern memory for storing a binary horizontal image-contraction control pattern, the number of bits in the horizontal image-contraction control pattern being at least as great as the samples-per-line number of luminance samples in a television line, the horizontal window control means being adapted to enable or disable the shifting of individual ones of corresponding luminance and chrominance samples from a television line into the luminance and chrominance first-in-first-out devices, respectively, in accordance with the state of corresponding individual bits in the horizontal image-contraction control pattern stored in the horizontal image-contraction control-pattern memory;

(d) vertical window control means for controllably enabling and disabling the loading of luminance and chrominance samples from individual ones of the television lines into the frame buffer, the vertical window control means including a vertical image-contraction control-pattern memory for storing a binary vertical image-contraction control pattern, the number of bits in the vertical image-contraction control pattern being at least as great as the lines-per-frame number of television lines, the vertical window control means being adapted to enable or disable the storing of samples from individual ones of the television lines in accordance with the state of corresponding individual bits in the vertical image-contraction control pattern stored in the vertical image-contraction control-pattern memory; and

(e) computation means connected to the horizontal window control means and to the vertical window control means for generating horizontal image-contraction control patterns for storage in the horizontal image-contraction control-pattern memory of the horizontal window control means, and vertical image-contraction control patterns for storage in the vertical image-contraction control-pattern memory of the vertical window control means, the computation means being adapted to calculate each of the horizontal and vertical image-contraction control patterns essentially by a computer-graphics vector-drawing procedure.

3. The interface circuit according to claim 2 in which the vector-drawing procedure includes stepwise altering a cross-multiplication error term towards zero.

4. The interface circuit according to claim 3 in which the vector-drawing procedure in a Bresenham vector-drawing procedure.

5. The interface circuit according to claim 3 in which the vector-drawing procedure includes varying an initial term from pattern to pattern to introduce a variation in the patterns.