Linear load circuit to control switching power supplies under minimum load conditions

• US 5,285,367 A
• Filed: 02/07/1992
• Issued: 02/08/1994
• Est. Priority Date: 02/07/1992
• Status: Expired due to Term

• Current Assignee: Power Integrations Incorporated
• Original Assignee: Power Integrations Incorporated
• Inventors: Keller, Richard A.
• Primary Examiner(s): Stephan, Steven L.
• Assistant Examiner(s): BERHANE, ADOLF D
• Application Number:
  US07/832,233
• Time in Patent Office: 732 Days
• Field of Search: 363/19, 363/21, 363/23, 363/25, 363/28, 363/78, 363/97, 323/222, 323/282, 323/284, 323/267, 323/902
• US Class Current: 363/21.09
• CPC Class Codes: G05F 1/563 including two stages of regulation at least one of which is output level responsive, e.g. coarse and fine regulation
• CPC Class Codes: H02M 3/33507 with automatic control of the output voltage or current, e.g. flyback converters H02M3/33561, H02M3/33569 take precedence

Abstract

An embodiment of the present invention is a switching power supply comprising a transformer with a primary and two secondaries, a switching transistor in series with the primary, a rectifier and filter on one secondary to provide regulated output power, a feedback control circuit that monitors the secondary and adjusts the duty cycle of an on-off control signal to the switching transistor to maintain a constant output at the terminals, and a monitor that detects when the power level flowing through the switching regulator has dropped to a predetermined minimum and then linearly turns on a load to the transformer. Transistor is typically a power MOSFET. The monitor tracks a summing junction current before any slope compensation is added. Load is a shunt regulator that is activated when the summing junction current falls below 12% of full scale. Alternatively, the predetermined value of 12% is adjustable. The shunt regulator load increases the load on secondary until the summing junction current returns to 12% of full scale. The feedback control circuit and monitor are preferably fabricated on a single monolithic integrated circuit which increases its power dissipation when the monitor activates the shunt regulator load.

Claims

1. A switching power supply for maintaining a regulated voltage into a variable output load that can include a no load condition and where the power supply includes a transformer with a primary winding for receiving unregulated input power and a first secondary winding for driving a regulated voltage output and a second secondary winding for controlling a power transistor in series with said primary winding with a feedback loop, comprising:

a transistor linear regulator load connected as a load across said second secondary winding for proportionately shunting said second secondary winding;

a monitor having a summing junction connected to sense a current in said second secondary winding which is proportional to a power output level of said switching power supply; and

shunt control means connected to receive a signal from the monitor that represents said power output level and to produce a control signal to the transistor linear regulator load such that a predetermined minimum load on said power supply is maintained by the transistor linear regulator load despite said variable output load conditions that include no load, wherein a no-load or below minimum load condition of said regulated voltage output will be substantially fully compensated by a balancing load developed in said second secondary winding.

2. The power supply of claim 1, wherein:

the shunt control means includes means for responding with a turn-on signal to the transistor linear regulator load when said summing junction current drops below approximately 12% of its full scale value.

3. The power supply of claim 1, wherein:

the shunt control means has a gain equal to an associated current mode switching regulator gain.

4. An integrated circuit (IC) for a switching power supply that includes a transformer with a primary winding for receiving unregulated output power and a first secondary winding for driving a regulated voltage output and a second secondary winding for controlling a power transistor in series with said primary winding with a feedback loop, comprising in a single semiconductor device:

a switching transistor for controlling input power to said primary winding and having a minimum operating duty cycle below which said regulated voltage output would otherwise become unregulated;

a feedback circuit for sampling said secondary winding power output and for controlling the switching transistor to maintain said regulated output voltage above a predetermined minimum load value; and

a minimum load monitor for proportionately adding an active load to said second secondary winding power output wherein the feedback circuit is operated at said predetermined minimum load value and the switching transistor is operated above said minimum operating duty cycle, wherein the minimum load monitor includes;

a current mirror transistor for receiving an input signal from a current mode controller;

a current limiting resistor for limiting current through the current mirror transistor;

a pair of first and second amplifier transistors for amplifying a current coupled from the current mirror transistor through the current limiting resistor;

a current-subtraction transistor for subtracting said amplified current from the pair of amplifier transistors from a fixed current;

a system of transistors for receiving a mirrored current from said second of the pair of amplifier transistors than first occurs when a current in said fist of the pair of amplifier transistors drops below a first predetermined current;

a low pass resistor-capacitor (RC) filter;

a load transistor coupled to the system of transistors through the low pass resistor-capacitor (RC) filter for sinking an increasing level of current said current in said first of the pair of amplifier transistors drops approaches a second predetermined current that is less than said first predetermined current.

5. The IC of claim 4, wherein:

the system of transistors has a current gain of approximately 5,760, wherein twenty-two microamperes of current through said second of the pair of amplifier transistors will result in approximately 125 milliamperes of current flowing through the load transistor; and

low pass resistor-capacitor (RC) filter comprises a 150 K ohm resistor and about 36 picofarads of gate capacitance in the load transistor.