A/D converter with zero power mode

• US 5,294,928 A
• Filed: 08/31/1992
• Issued: 03/15/1994
• Est. Priority Date: 08/31/1992
• Status: Expired due to Term

• Current Assignee: Microchip Technology Incorporated
• Original Assignee: Microchip Technology Incorporated
• Inventors: Mitra, Sumit, Cooper, Russ
• Primary Examiner(s): Hoff, Marc S.
• Application Number:
  US07/938,908
• Time in Patent Office: 561 Days
• Field of Search: 307/272.3, 307/296.3, 341/142, 341/155
• US Class Current: 341/142
• CPC Class Codes: H03M 1/002 Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed
• CPC Class Codes: H03M 1/468 in which the input S/H circuit is merged with the feedback DAC array
• CPC Class Codes: H03M 1/804 with charge redistribution

Abstract

A semiconductor microcontroller includes the capability to perform analog to digital conversions of an analog signal representative of a variable parameter indicative of the need to exercise a control function. While the analog to digital conversions are being performed, the microcontroller processor can be placed in a sleep mode which eliminates noise arising from switching activities of the processor as a source of inaccuracy in the conversion process. At the end of the conversion, the analog to digital converter can either shut itself down or wake up the processor. Alternatively, the converter may shut itself down in response to a different user selected control signal.

Claims

1. A microcontroller, microprocessor, digital signal processor or other semiconductor chip device having intelligent control logic and a system clock, and adapted to perform analog to digital conversions of a predetermined analog input signal, comprising:

means for sampling the analog input signal to generate samples thereof,

analog to digital conversion means for performing conversions on the samples of the analog input signal as part of the device operation, said analog to digital conversion means including its own clock independent of said system clock,

means for selectively deactivating the semiconductor chip device by generating an electrical deactivating signal to place it in a sleep mode,

means responsive to a deactivating signal, for preventing deactivation of the semiconductor chip device while sampling of the analog input signal is taking place, and

means for deactivating the analog to digital conversion means at selected times except when the analog to digital conversion means is performing its conversions.

2. The device of claim 1, wherein:

the analog to digital conversion means includes amplifier means with biasing circuitry, and

the means for deactivating the analog to digital conversion means deactivates the biasing circuitry of the amplifier means.

3. The device of claim 1, wherein:

the means for deactivating the analog to digital conversion means turns off the power consuming elements thereof.

4. The device of claim 1, wherein:

the analog to digital conversion means comprises a CMOS integrated circuit fabricated on a single semiconductor chip as part of the device.

5. In a microcontroller for performing embedded control of a controlled system, and adapted to convert samples of an analog signal in the system representing a variable parameter indicative of whether or not a control function is to be exercised by the microcontroller to a digital form, and including a system clock and a source of power for the microcontroller, the improvement comprising:

an analog to digital converter for converting the analog samples to digital form, said converter including an internal clock independent of the microcontroller system clock,

control logic means for generating a command to disable the system clock and thereby place the microcontroller in a sleep state in the absence of need for exercise of a control function by the microcontroller, without affecting conversions in progress by the converter, and including means for powering down the analog to digital converter upon completion of the conversions in progress while the system clock remains disabled.

6. The improvement of claim 5, wherein:

the converter includes means for generating an interrupt signal upon completion of the conversions in progress to restore the system clock and thereby awaken the microcontroller from the sleep state.

7. The improvement of claim 6, wherein:

the converter further includes means for sensing whether the microcontroller has ignored the interrupt signal and, if so, for powering itself down.

8. The improvement of claim 7, wherein:

the converter further includes means for detecting awakening of the microcontroller to turn itself back on for further sampling and conversions.

9. The improvement of claim 8, wherein:

the control logic means includes means responsive to ongoing sampling of the analog signal for causing the microcontroller to ignore the command to disable the system clock, and thereby prevent the microcontroller from entering the sleep state.

10. A method of operating a microcontroller device adapted to perform analog to digital conversions of samples of an analog signal derived from a controllable electronic system to determine whether a predetermined control function of the microcontroller device should be performed, said microcontroller device having an analog to digital converter, intelligent control logic and a device clock for timing functions within the microcontroller device operation, said method comprising the steps of:

converting a plurality of samples obtained from the analog signal to digital format using the analog to digital converter in conjunction with an internal clock separate from and independent of the device clock,

instructing the microcontroller device from the control logic to enter a sleep state in which all timing and switching functions controlled by the device clock are ceased,

continuing the conversions of the obtained samples using the internal clock after the microcontroller device has been put in a sleep state, and

ignoring the instruction to the microcontroller device to enter the sleep state until after all of the samples of the analog signal have been obtained.

11. The method of claim 10, including:

commencing the conversions by the analog to digital converter as a signal to the control logic for instructing the microcontroller device to enter the sleep state, while preventing the analog to digital converter from being put in sleep state simultaneously with the microcontroller device.

12. The method of claim 11, further including:

notifying the microcontroller device by generating an interrupt signal when the conversions of all samples are completed by the analog to digital converter, to enable the microcontroller device to restart the device clock.

13. The method of claim 12, further including:

monitoring the microcontroller device to determine whether it has restarted the device clock after generating the interrupt signal, and, if it has not, notifying the analog to digital converter to enter a sleep state.

14. The method of claim 12, further including:

upon notifying the analog to digital converter to enter a sleep state, deactivating all of its direct current consuming circuitry.