Semiconductor memory device

  • US 5,297,029 A
  • Filed: 12/18/1992
  • Issued: 03/22/1994
  • Est. Priority Date: 12/19/1991
  • Status: Expired due to Term
First Claim
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1. A semiconductor memory device having a plurality of memory cells disposed in a matrix form, data in said memory cells at a selected row being transferred in parallel to a plurality of data registers, the data transferred in said data registers being serially outputted to an external circuit, and the above-described operations being repeated to allow a page data read operation, comprising:

  • address input means for storing a data read start address inputted from said external circuit;

    address control means for incrementing an internal address stored in said address input means;

    read means for transferring data in said memory cells to said data registers after outputting data of one page from said data registers; and

    busy signal output means for outputting a busy signal indicating a disabled access to said external circuit while said read means is transferring data.

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