Encapsulated electronic package

• US 5,313,365 A
• Filed: 06/30/1992
• Issued: 05/17/1994
• Est. Priority Date: 06/30/1992
• Status: Expired due to Term

• Current Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Juskey, Frank J., Gold, Glenn E., Pennisi, Robert W., Urbish, Glenn F.
• Primary Examiner(s): Picard, Leo P.
• Assistant Examiner(s): LEDYNH, BOT L
• Application Number:
  US07/906,346
• Time in Patent Office: 686 Days
• Field of Search: 257/787, 257/788, 257/789, 257/790, 257/791, 257/792, 257/793, 257/794, 257/795, 257/678, 257/701, 257/702, 174/52.2, 174/52.3, 174/52.4, 361/392, 361/394, 361/395, 361/397, 361/399, 361/400, 361/401
• US Class Current: 361/760
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/45147 Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/85205 Ultrasonic bonding
• CPC Class Codes: H01L 23/293 Organic, e.g. plastic
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/181 : Encapsulation

Abstract

An encapsulated electronic package (10) is made by bonding one or more semiconductor devices or integrated circuits (16) to a printed circuit board with an adhesive (14), and covering with a glob top encapsulant (15). The printed circuit board has a metal circuit pattern (12) on one side, and, optionally, solder pads (27) on the second side. The glob top encapsulant covers the integrated circuit, portions of the metal circuit pattern, and portions of the printed circuit board surface. The printed circuit board, the adhesive, and the encapsulant are all made from the same type of resin. In the preferred embodiment of the invention, the resin used to make the printed circuit board, the adhesive, and the encapsulant is an organosilicon polymer comprised substantially of alternating polycyclic hydrocarbon residues and cyclic polysiloxane or siloxysilane residues linked through carbon-silicon bonds.

Claims

1. An electronic package, comprising:

a printed circuit board having a metal circuit pattern disposed on a first major surface thereof;

a semiconductor device attached to the printed circuit board by means of an adhesive;

an encapsulant covering the semiconductor device and portions of the printed circuit board major surface; and

the adhesive and the encapsulant comprising an organosilicon polymer comprised substantially of alternating polycyclic hydrocarbon residues and cyclic polysiloxane or siloxysilane residues linked through carbon-silicon bonds.

2. The electronic package as described in claim 1, wherein the semiconductor device is an integrated circuit chip.

3. The electronic package as described in claim 2, wherein the semiconductor device is wirebonded to the metal circuit pattern.

4. The electronic package as described in claim 1, further comprising an array of solder pads situated on a second opposing major surface of the printed circuit board and electrically connected to the semiconductor device.