High efficiency N-channel charge pump having a primary pump and a non-cascaded secondary pump
First Claim
Patent Images
1. A charge pump for an integrated circuit comprising:
- a secondary charge pump coupled to a first node;
a first transistor having a gate electrode, a source electrode and a drain electrode, wherein said gate electrode is coupled to said first node, said source electrode is coupled to a pumped node, and said drain electrode is coupled to a second node;
a second transistor having a gate electrode, a source electrode and a drain electrode, wherein said source electrode is coupled to said second node, said drain electrode is coupled to a first voltage supply, and said gate electrode is coupled to a third node;
a third transistor having a gate electrode, a source electrode and drain electrode, wherein said drain electrode and gate electrode are coupled to said first voltage supply, and said source electrode is coupled to said third node;
a fourth transistor having a gate electrode, a source electrode and a drain electrode, wherein said drain electrode is coupled to said first voltage supply, said source electrode is coupled to said third node, and said gate electrode is coupled to said first node;
a fifth transistor having a gate electrode, a source electrode and a drain electrode, wherein said drain electrode is coupled to said first voltage supply, said source electrode is coupled to said first node, and said gate electrode is coupled to a fourth node;
a sixth transistor having a gate electrode, a source electrode and a drain electrode, wherein said drain electrode is coupled to said first voltage supply, said source electrode is coupled to said fourth node, and said gate electrode is coupled to said first node; and
a plurality of capacitors coupling respective clock signals to said first, second, third and fourth nodes.
5 Assignments
Litigations
0 Petitions
Accused Products
Abstract
A high efficiency charge pump for low and wide voltage ranges. The charge pump includes main and secondary charge pumps, the secondary charge pump is employed to avoid the VtN drop that the main charge pump exhibits. The secondary charge pump allows the main charge pump to pump to a theoretical maximum of 2 VCC, while maintaining an efficiency close to 40%.
53 Citations
29 Claims
-
1. A charge pump for an integrated circuit comprising:
-
a secondary charge pump coupled to a first node; a first transistor having a gate electrode, a source electrode and a drain electrode, wherein said gate electrode is coupled to said first node, said source electrode is coupled to a pumped node, and said drain electrode is coupled to a second node; a second transistor having a gate electrode, a source electrode and a drain electrode, wherein said source electrode is coupled to said second node, said drain electrode is coupled to a first voltage supply, and said gate electrode is coupled to a third node; a third transistor having a gate electrode, a source electrode and drain electrode, wherein said drain electrode and gate electrode are coupled to said first voltage supply, and said source electrode is coupled to said third node; a fourth transistor having a gate electrode, a source electrode and a drain electrode, wherein said drain electrode is coupled to said first voltage supply, said source electrode is coupled to said third node, and said gate electrode is coupled to said first node; a fifth transistor having a gate electrode, a source electrode and a drain electrode, wherein said drain electrode is coupled to said first voltage supply, said source electrode is coupled to said first node, and said gate electrode is coupled to a fourth node; a sixth transistor having a gate electrode, a source electrode and a drain electrode, wherein said drain electrode is coupled to said first voltage supply, said source electrode is coupled to said fourth node, and said gate electrode is coupled to said first node; and a plurality of capacitors coupling respective clock signals to said first, second, third and fourth nodes. - View Dependent Claims (2, 3, 4)
-
-
5. A charge pump for an integrated circuit comprising:
-
a first transistor having a gate electrode, a source electrode and a drain electrode, wherein said gate electrode is coupled to a first node, said source electrode is coupled to a pumped node, and said drain electrode is coupled to a second node; a second transistor having a gate electrode, a source electrode and a drain electrode, wherein said drain electrode is coupled to a first voltage supply, said gate electrode is coupled to a third node, and said source electrode is coupled to said second node; a third transistor having a gate electrode, a source electrode and a drain electrode, wherein said drain electrode and gate electrode are coupled to said first voltage supply, and said source electrode is coupled to said third node; a fourth transistor having a gate electrode, a source electrode and a drain electrode, wherein said drain electrode is coupled to said first voltage supply, said source electrode is coupled to said third node, and said gate electrode is coupled to said first node; a fifth transistor having a gate electrode, a source electrode and a drain electrode, wherein said drain electrode is coupled to said first voltage supply, said source electrode is coupled to said first node, and said gate electrode is coupled to a fourth node; a sixth transistor having a gate electrode, a source electrode and a drain electrode, wherein said drain electrode is coupled to said first voltage supply, said source electrode is coupled to said third node, and said gate electrode is coupled to a fifth node; a seventh transistor having a gate electrode, a source electrode and a drain electrode, wherein said drain electrode is coupled to said first voltage supply, said source electrode is coupled to said fourth node, and said gate electrode is coupled to said first node; an eighth transistor having a gate electrode, a source electrode and a drain electrode, wherein said source electrode is coupled to said first node, said drain electrode is coupled to a sixth node, and said gate electrode is coupled to said fifth node; a ninth transistor having a gate electrode, a source electrode and a drain electrode, wherein said drain electrode is coupled to said first voltage supply, said source electrode is coupled to said fifth node, and said gate electrode is coupled to a seventh node; a tenth transistor having a gate electrode, a source electrode and a drain electrode, wherein said drain electrode is coupled to said first voltage supply, said source electrode is coupled to said seventh node, and said gate electrode is coupled to said fifth node; an eleventh transistor having a gate electrode, a source electrode and a drain electrode, wherein said drain electrode and said gate electrode are coupled to said first voltage supply, and said source electrode is coupled to said seventh node; a twelfth transistor having a gate electrode, a source electrode and a drain electrode, wherein said source electrode is coupled to said sixth node, said drain electrode is coupled to said first voltage supply, and said gate electrode is coupled to said seventh node; a plurality of capacitors coupling respective clock signals to said first, second, third, fourth, fifth, sixth and seventh nodes. - View Dependent Claims (6, 7, 8)
-
-
9. A charge pump for an integrated circuit comprising:
-
a first charge pump including a first transistor having a gate electrode, a first electrode and a second electrode, wherein said gate electrode is coupled to a first node, said first electrode is coupled to a capacitive load, and said second electrode is coupled to a second node, wherein said second node is connected to receive a first clock signal via a first capacitor; a second transistor having a gate electrode coupled to a third node, the second transistor selectively coupling a supply voltage VCC to said second node, whereby said second node can receive VCC and then be boosted to 2 VCC by a transition in said first clock pulse; a first voltage generation circuit for developing a voltage higher than 2 VCC at said first node, including a third transistor for selectively coupling VCC to the first node, a second charge pump for pumping charge to said first node to elevate the voltage thereof above VCC, and a second capacitor coupling a second clock signal to said first node for boosting said first node voltage to above 2 VCC, whereby the first transistor can couple a full 2 VCC from the second node to the capacitive load; and a second voltage generation circuit for developing a voltage of 2 VCC at said third node, including a fourth transistor for selectively Coupling VCC to said third node and a third capacitor for coupling a third clock signal to said third node go that said third node voltage may be boosted.
-
-
10. A charge pump for an integrated circuit comprising:
-
a first charge pump having first charge pump output, a first charge pump input, and an internal node distinct from said first charge pump input; and a second charge pump having a second charge pump input and a second charge pump output, said second charge pump output being coupled to said internal node for pumping said internal node to a high voltage, said first charge pump receiving a power supply of VCC at said first charge pump input, said second charge pump also receiving a power supply of VCC at said second charge pump input; wherein said first charge pump includes first and second transistors having a first node coupled between them, wherein said first node is coupled to receive a first clock signal, wherein said first transistor is coupled to said first charge pump input, wherein said second transistor is coupled to said first charge pump output, and wherein said internal node is coupled to a control electrode of said second transistor; whereby said first charge pump is able to pump said first charge pump output to a full 2 VCC. - View Dependent Claims (11)
-
-
12. A charge pump for an integrated circuit comprising:
-
a first charge pump having first pump input coupled to receive a power supply voltage of VCC, a first pump output, and a first transistor selectively coupling said first pump input to said first pump output, so that charge from the first pump input can be transferred via the first transistor to the first pump output; an internal node, distinct from said first pump input and coupled to a control electrode of said first transistor; and a second charge pump having a second pump input coupled to receive said power supply voltage of VCC, and a second pump output, said second pump output being coupled to said internal node for pumping said internal node to a voltage sufficient to permit said first transistor to develop a full 2 VCC at said first charge pump output. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25)
-
-
26. A method of pumping charge in an integrated circuit charge pump comprising the steps of:
-
turning on a first switch to couple a supply voltage VCC to a first node;
thenturning off the first switch; turning on a second switch to pump charge from a second node to said first node so that the first node voltage rises higher than VCC;
thenturning off the second switch;
thencapacitively coupling a first clock pulse transition to the first node to drive the first node voltage above 2 VCC; and developing a voltage of about 2 VCC at a third node isolated from the first node; and controlling a third switch using the first node voltage to cause the third switch to pump a full 2 VCC from the third node to an output node. - View Dependent Claims (27)
-
-
28. A method of pumping charge in an integrated circuit charge pump comprising the steps of:
-
operating a first charge pump by coupling a supply voltage VCC to a first node, then driving said first node to 2 VCC, and turning on a first switch device to transfer the voltage on said first node to a capacitive output node; wherein said step of turning on the first switch device includes a further step of operating a second charge pump to develop a voltage higher than 2 VCC on a control electrode of the first switch device.
-
-
29. A method of chaise pumping in an integrated circuit to develop a high voltage comprising the steps of:
-
operating first and second charge pumps, each having a respective output node, without cascading the pumps, so that current at the second pump output node is not transferred or pumped to the first pump output node, operating the first charge pump by pumping charge from a first capacitor to an output node having an associated load capacitance, operating the second charge pump by pumping charge from a second capacitor to an internal node, to develop a voltage higher at the internal node than a voltage developed at said first capacitor, the internal node having a third capacitance associated therewith, wherein the step of operating the first charge pump further includes using the high voltage developed on the internal node as a control signal in the pumping of charge from the first capacitor to the output node.
-
Specification