Semiconductor integrated circuit unit

• US 5,412,558 A
• Filed: 09/07/1993
• Issued: 05/02/1995
• Est. Priority Date: 01/31/1990
• Status: Expired due to Term

• Current Assignee: Hitachi Haramachi Semi-Conductor Limited, Hitachi, Ltd.
• Original Assignee: Hitachi Haramachi Semi-Conductor Limited, Hitachi, Ltd.
• Inventors: Kanouda, Akihiko, Mori, Mutsuhiro, Miyazaki, Hideki, Onda, Kenichi, Sakurai, Naoki, Arakawa, Hidetoshi
• Primary Examiner(s): Stephan, Steven L.
• Assistant Examiner(s): BERHANE, ADOLF D
• Application Number:
  US08/117,935
• Time in Patent Office: 602 Days
• Field of Search: 363/37, 363/56, 363/98, 363/131, 363/132, 257/678, 257/684, 257/146, 257/368
• US Class Current: 363/98
• CPC Class Codes: H01L 21/76297 Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
• CPC Class Codes: H01L 27/0635 in combination with bipolar transistors and diodes, or resistors, or capacitors
• CPC Class Codes: H01L 29/0692 Surface layout
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/7394 on an insulating layer or substrate, e.g. thin film device or device isolated from the bulk substrate H01L29/7398 takes precedence
• CPC Class Codes: H01L 29/7398 with both emitter and collector contacts in the same substrate side
• CPC Class Codes: H01L 29/872 Schottky diodes
• CPC Class Codes: H02M 7/003 Constructional details, e.g. physical layout, assembly, wiring or busbar connections
• CPC Class Codes: H02M 7/5387 in a bridge configuration
• CPC Class Codes: H02P 6/085 in a bridge configuration

Abstract

A semiconductor integrated circuit unit, suitable for the control of a motor, has an integrated structure within the same semiconductor substrate, comprising an inverter circuit, drive circuits for driving the switching elements of the inverter circuit, an internal power source circuit for supplying power to the drive circuits which drive the upper arm side of the inverter circuit, and a logical circuit for transmitting a signal to the drive circuits which drive the upper arm side of the inverter circuit.

Claims

1. A semiconductor integrated circuit characterized in that there are integrally formed within the same semiconductor substrate:

a pair of DC terminals;

a pair of first wirings connected to said DC terminals, through which a main current flows;

a plurality of AC terminals equal in number to the number of phases of an AC power supply;

a pair of auxiliary DC terminals;

a pair of second wirings connected to said auxiliary DC terminals, through which a current smaller than said main current flows;

a control terminal;

an inverter circuit including a plurality of inverter units connected in parallel to each other between said pair of DC terminals, said inverter units being equal in number to the number of phases of the AC power supply, each of said inverter units having two serially connected pairs of inverter elements, each having an inverse-parallel-connected switching element and a diode, a middle point of said each inverter unit being connected to a corresponding one of said plurality of AC terminals;

a first plurality of driving circuits for respectively driving the switching elements at one side of the inverter units of said inverter circuit;

a second plurality of driving circuits receiving a power supply from said pair of auxiliary DC terminals, for respectively driving the switching elements at another side of the inverter units of said inverter circuit;

a logical circuit connected to receive a control signal from said control terminal, for transmitting the control signal to said first plurality of driving circuits and to said second plurality of driving circuits;

a plurality of level shift circuits respectively interposed between said first plurality of driving circuits and said logical circuit; and

an internal power supply circuit connected to said pair of auxiliary DC terminals for supplying power to said first plurality of driving circuits,

wherein in each of said pairs of inverter elements said switching element is positioned adjacent to said diode, and said switching element comprises a lateral insulation gate bipolar transistor, and said diode is provided with a rectification junction structured by a pn junction and a Schottky junction.

2. A semiconductor integrated circuit according to claim 1, characterized in that said semiconductor substrate is a dielectric isolated substrate comprising a plurality of semiconductor islands supported by a supporter through a dielectric film, and said lateral insulation gate bipolar transistors and said diodes of said pairs of inverter elements are formed on said semiconductor islands.

3. A semiconductor integrated circuit according to claim 2, characterized in that each of said lateral insulation gate bipolar transistors comprising the semiconductor integrated circuit comprises:

a first semiconductor region of n- type conductivity extending from a main surface of the semiconductor island into the semiconductor island,

a second semiconductor region of p type extending from the main surface of the semiconductor island into said first semiconductor region,

third semiconductor region of n+ type extending from the main surface of the semiconductor island into said second semiconductor region,

a fourth semiconductor region of p+ type extending from the main surface of the semiconductor island into said first semiconductor region, and formed away from said second semiconductor region,

a first main electrode connected to said second semiconductor region and said third semiconductor region on the main surface of the semiconductor island,

a second main electrode connected to said fourth semiconductor region on the main surface of the semiconductor island, and

a control electrode formed over an insulation film on said second semiconductor region positioned between said first semiconductor region and said third semiconductor region on the main surface of the semiconductor island.

4. A semiconductor integrated circuit according to claim 3, characterized in that a fifth semiconductor region of n type extends from the main surface of the semiconductor island into said first semiconductor region and is formed away from said second semiconductor region, wherein said fourth semiconductor region is formed in said fifth semiconductor region, and further in that said second semiconductor region and the fifth semiconductor region extend along a first direction from a viewpoint of the surface of the semiconductor island and are positioned adjacent to each other in a second direction perpendicular to said first direction.

5. A semiconductor integrated circuit according to claim 4, characterized in that said third semiconductor region is intermittently formed along said first direction.

6. A semiconductor integrated circuit according to claim 4, characterized in that said fourth semiconductor region is extended along and formed in said first direction.

7. A semiconductor integrated circuit according to claim 2, characterized in that the main surface area of the semiconductor island on which said diode is formed is made smaller than a main surface area of a semiconductor island on which said lateral insulation gate bipolar transistor is formed.

8. A semiconductor integrated circuit according to claim 2, characterized in that the main surface area of the semiconductor island on which a diode connected in an inverse parallel fashion to a switching element at one side is formed is made larger than a main surface area of a semiconductor island on which a diode connected in an inverse parallel fashion to a switching element at another side is formed.

9. A semiconductor integrated circuit according to claim 3, characterized in that a fifth semiconductor region of n type extends from the main surface of the semiconductor island into said first semiconductor region and is formed away from said second semiconductor region, wherein said fourth semiconductor region is formed in said fifth semiconductor region.

10. A semiconductor integrated circuit comprising:

a semiconductor substrate;

a lateral insulation gate bipolar transistor formed adjacent to a main surface of said semiconductor substrate, said lateral insulation gate bipolar transistor comprising;

a first semiconductor region of n- type extending from a main surface of the semiconductor substrate into the semiconductor substrate,

a second semiconductor region of p- type extending from the main surface of the substrate into the first semiconductor region,

a third semiconductor region of n+ type extending from the main surface of the semiconductor substrate into said second semiconductor region,

a fourth semiconductor region of p+ type extending from the main surface of the semiconductor substrate into said first semiconductor region, and formed away from said second semiconductor region,

a first main electrode connected to said second semiconductor region and said third semiconductor region on the main surface of the semiconductor substrate,

a second main electrode connected to said fourth semiconductor region on the main surface of the semiconductor substrate,

a control electrode formed over an insulation film on said second semiconductor region positioned between said first semiconductor region and said third semiconductor region on the main surface of the semiconductor substrate; and

a diode formed adjacent to the main surface of said semiconductor substrate, and positioned adjacent to said lateral insulation gate bipolar transistor, said diode being provided with a rectification junction structured by a pn junction and a Schottkey junction connected in an inverse parallel fashion to said lateral insulation gate bipolar transistor.

11. A semiconductor integrated circuit according to claim 10, characterized in that said semiconductor substrate is a dielectric isolated substrate comprising a plurality of semiconductor islands supported by a supporter through a dielectric film, and said lateral insulation gate bipolar transistor and said diode are formed on said semiconductor islands.

12. A semiconductor integrated circuit according to claim 10, characterized in that a fifth semiconductor region of n type extends from the main surface of the semiconductor substrate into said first semiconductor region and is formed away from said second semiconductor region, wherein said fourth semiconductor region is formed in said fifth semiconductor region.

13. A semiconductor integrated circuit according to claim 11, characterized in that the main surface area of the semiconductor island on which said diode is formed is made smaller than a main surface area of a semiconductor island on which said lateral insulation gate bipolar transistor is formed.

14. A semiconductor integrated circuit comprising:

a semiconductor substrate;

a lateral insulation gate bipolar transistor formed adjacent to a main surface of said semiconductor substrate; and

a diode formed adjacent to the main surface of said semiconductor substrate, and positioned adjacent to said lateral insulation gate bipolar transistor, and provided with a rectification junction structured by a pn junction and a Schottkey junction connected in an inverse parallel fashion to said lateral insulation gate bipolar transistor, characterized in that said lateral insulation gate bipolar transistor of the semiconductor integrated circuit comprises;

a first semiconductor region of n- type extending from a main surface of the semiconductor island into the semiconductor island,

a second semiconductor region of p type extending from the main surface of the semiconductor island into said first semiconductor region,

a third semiconductor region of n+ type extending from the main surface of the semiconductor island into said second semiconductor region,

a fourth semiconductor region of p+ type extending from the main surface of the semiconductor island into said first semiconductor region and formed away from said second semiconductor region,

a first main electrode connected to said second semiconductor region and said third semiconductor region on the main surface of the semiconductor island,

a second main electrode connected to said fourth semiconductor region on the main surface of the semiconductor island, and

a control electrode formed over an insulation film on said second semiconductor region positioned between said first semiconductor region and said third semiconductor region on the main surface of the semiconductor island.

15. A semiconductor integrated circuit according to claim 14, characterized in that a fifth semiconductor region of n type extends from the main surface of the semiconductor island into said first semiconductor region and is formed away from said second semiconductor region, wherein said fourth semiconductor region is formed in said fifth semiconductor region, and further in that said second semiconductor region and the fifth semiconductor region extend along a first direction from a viewpoint of the surface of the semiconductor island and are positioned adjacent to each other in a second direction perpendicular to said first direction.

16. A semiconductor integrated circuit according to claim 15, characterized in that said third semiconductor region is intermittently formed along said first direction.

17. A semiconductor integrated circuit according to claim 14, characterized in that a fifth semiconductor region of n type extends from the main surface of the semiconductor island into said first semiconductor region and is formed away from said second semiconductor region, wherein said fourth semiconductor region is formed in said fifth semiconductor region.

18. A semiconductor integrated circuit according to claim 14, characterized in that said fourth semiconductor region is extended along and formed in said first direction.

19. A semiconductor integrated circuit comprising:

a semiconductor substrate;

six lateral insulation gate bipolar transistors, formed adjacent to a main surface of said semiconductor substrate and used as parallel circuit, each of said parallel circuits comprising two of said lateral insulation gate bipolar transistors connected in series, wherein each of said lateral insulation gate bipolar transistor comprises;

a first semiconductor region of n- type extending from a main surface of the semiconductor substrate into the semiconductor substrate,

a second semiconductor region of p type extending from the main surface of the substrate into the first semiconductor region,

a third semiconductor region of n+ type extending from the main surface of the semiconductor substrate into said second semiconductor region,

a fourth semiconductor region of p+ type extending from the main surface of the semiconductor substrate into said first semiconductor region and formed away from said second semiconductor region,

a first main electrode connected to said second semiconductor region and said third semiconductor region on the main surface of the semiconductor substrate,

a second main electrode connected to said fourth semiconductor region on the main surface of the semiconductor substrate, and

a control electrode formed over an insulation film on said second semiconductor region positioned between said first semiconductor region and said third semiconductor region on the main surface of the semiconductor substrate; and

six diodes formed adjacent to the main surface of said semiconductor substrate, and respectively positioned adjacent to said lateral insulation gate bipolar transistors, and each provided with a rectification junction structured by a pn junction and a Schottkey junction connected in an inverse parallel relationship to a corresponding one of said lateral insulation gate bipolar transistors.

20. A semiconductor integrated circuit according to claim 19, characterized in that said semiconductor substrate is a dielectric isolated substrate comprising a plurality of semiconductor islands supported by a supporter through a dielectric film, wherein one of said lateral insulation gate bipolar transistors and one of said diodes are respectively formed on each of said semiconductor islands.

21. A semiconductor integrated circuit according to claim 20, characterized in that for each of said semiconductor islands, the main surface area of the semiconductor island on which one of said diodes is formed is smaller than a main surface area of the semiconductor island on which the corresponding one of said lateral insulation gate bipolar transistors is formed.

22. A semiconductor integrated circuit according to claim 19, characterized in that a fifth semiconductor region of n type extends from the main surface of the semiconductor substrate into said first semiconductor region and is formed away from said second semiconductor region, wherein said fourth semiconductor region is formed in said fifth semiconductor region.

23. A semiconductor integrated circuit comprising:

a semiconductor substrate;

six lateral insulation gate bipolar transistors, formed adjacent to a main surface of said semiconductor substrate and used as parallel circuits, each of said parallel circuits comprising two of said lateral insulation gate bipolar transistors connected in series; and

six diodes formed adjacent to the main surface of said semiconductor substrate, and respectively positioned adjacent to said lateral insulation gate bipolar transistors, and each provided with a rectification junction structured by a pn junction and a Schottkey junction connected in an inverse parallel relationship to a corresponding one of said lateral insulation gate bipolar transistors, characterized in that each of said lateral insulation gate bipolar transistors comprises;

a first semiconductor region of n- type extending from a main surface of the semiconductor island into the semiconductor island,

a second semiconductor region of p type extending from the main surface of the semiconductor island into said first semiconductor region,

a third semiconductor region of n+ type extending from the main surface of the semiconductor island into said second semiconductor region,

a fourth semiconductor region of p+ type extending from the main surface of the semiconductor island into said first semiconductor region and formed away from said second semiconductor region,

a first main electrode connected to said second semiconductor region and said third semiconductor region on the main surface of semiconductor island,

a second main electrode connected to said fourth semiconductor region on the main surface of the semiconductor island, and

a control electrode formed on an insulation film on said second semiconductor region positioned between said first semiconductor region and said third semiconductor region on the main surface of the semiconductor island.

24. A semiconductor integrated circuit according to claim 23, characterized in that a fifth semiconductor region of n type extends from the main surface of the semiconductor island into said first semiconductor region and is formed away from said second semiconductor region, wherein said fourth semiconductor region is formed in said fifth semiconductor region, and further in that said second semiconductor region and a fifth semiconductor region extend along a first direction from a viewpoint of the main surface of the semiconductor island and are positioned adjacent to each other in a second direction perpendicular to said first direction.

25. A semiconductor integrated circuit according to claim 24, characterized in that said third semiconductor region is intermittently formed along said first direction.

26. A semiconductor integrated circuit according to claim 24, characterized in that said fourth semiconductor region is extended along and formed in said first direction.