Method and apparatus for improving data failure rate testing for memory arrays
First Claim
1. A circuit for testing the data failure rate of a memory array having controller means for controlling an input/output data path to the array, the circuit comprising:
- means in the controller means for writing a test pattern to the memory array; and
means in the controller means for detecting differences in data read from the memory array and the test pattern written to the memory array, the last mentioned means including means for reading data from the memory array,means for comparing the value of data read from the memory array with the value of data written to the array in the test pattern, andmeans for storing a indication that a comparison has produced a result indicating a failure to compare.means for reading data from the memory array comprises means for reading data at a first rate greater than that at which the data may be read by a host.
1 Assignment
0 Petitions
Accused Products
Abstract
A circuit for testing the data failure rate of a flash memory array comprising apparatus for writing a test pattern to a memory array; and apparatus positioned in a data path prior to the interface between the memory array and circuitry external to the memory array for detecting differences in data read from the memory array and the test pattern written to the memory array, the last mentioned apparatus including apparatus for reading data from the memory array, apparatus for comparing the value of data read from the memory array with the value of data written to the array in the test pattern, and apparatus for storing a indication that a comparison has produced a result indicating a failure to compare.
150 Citations
5 Claims
-
1. A circuit for testing the data failure rate of a memory array having controller means for controlling an input/output data path to the array, the circuit comprising:
-
means in the controller means for writing a test pattern to the memory array; and means in the controller means for detecting differences in data read from the memory array and the test pattern written to the memory array, the last mentioned means including means for reading data from the memory array, means for comparing the value of data read from the memory array with the value of data written to the array in the test pattern, and means for storing a indication that a comparison has produced a result indicating a failure to compare. means for reading data from the memory array comprises means for reading data at a first rate greater than that at which the data may be read by a host. - View Dependent Claims (2, 3, 4, 5)
-
Specification