Angular rate sensing system and method, with digital synthesizer and variable-frequency oscillator

• US 5,444,639 A
• Filed: 09/07/1993
• Issued: 08/22/1995
• Est. Priority Date: 09/07/1993
• Status: Expired due to Term

• Current Assignee: BEI Technologies, Incorporated
• Original Assignee: Rockwell International Corporation
• Inventors: White, Stanley A.
• Primary Examiner(s): Voeltz, Emanuel T.
• Assistant Examiner(s): Wachsman, Hal D.
• Application Number:
  US08/117,461
• Time in Patent Office: 714 Days
• Field of Search: 364/572, 364/574, 364/565, 364/724.17, 364/721, 364/718, 364/724.03, 364/724.01, 329/325, 331/11, 331/25, 73/504, 73/505, 73/510, 375/83, 375/96, 375/94, 84/1.12, 395/325
• US Class Current: 708/300
• CPC Class Codes: G01C 19/5607 using vibrating tuning forks double-ended tuning forks using planar vibrating masses suspended at opposite ends G01C19/5719

Abstract

For use with a quartz angular rate sensor, a frequency and phase-locked synthesizer recovers a reference signal virtually free of phase noise, and generates a quadrature-phase reference signal for complex demodulation of the angular rate signal. The synthesizer also ensures a precisely adjusted phase shift of approximately zero across the drive tines of the sensor. Moreover, the digital synthesizer provides a precise numerical indication of the drive frequency, which can be used for compensation and automatic tuning of filters, such as a tracking filter, a filter in an automatic gain control, and notch filters in the phase and/or frequency detectors in the digital synthesizer. The tracking filter is used as a pre-filter for the synthesizer, and is responsive to a passband-width control signal generated from the magnitude of the frequency and phase error signal controlling the frequency generated by the synthesizer. Preferably the synthesizer has an oscillator controller for producing a pair of frequency control signals that are the sine and cosine of a frequency control parameter (φ), and one of these control signals is generated from the other by a polynomial approximation. To compensate for roundoff error, when one of the in-phase or quadrature-phase outputs has a magnitude less than a limit value, a compensated value for the other output is computed from an even polynomial of the magnitude.

Claims

1. An angular-rate sensing system comprising, in combination:

(a) an angular rate sensor having a drive signal input, a drive signal output, and a rate signal output;

(1) said angular rate sensor producing at said rate signal output an angular rate signal modulated on a carrier frequency when said drive signal input is excited at said carrier frequency;

(2) said angular rate sensor having a resonant frequency at which there is approximately zero phase shift from said drive signal input to said drive signal output;

(b) a drive circuit connected to said drive signal input and said drive signal output for exciting said drive signal input at approximately said resonant frequency;

(c) a demodulator circuit connected to said rate signal output and said drive circuit for demodulating said angular rate signal;

(d) wherein said drive circuit includes a phase-locked sinusoid generator connected to said drive signal output and said drive signal input for producing a sinusoidal signal at said drive signal input;

(1) said phase-locked sinusoid generator including a variable-frequency oscillator generating said sinusoidal signal and having a frequency control input and an oscillator output, said oscillator output being connected to said drive signal input for driving said drive signal input with said sinusoidal signal; and

(2) said phase-locked sinusoid generator further including a phase detector having a first phase input connected to said drive signal output, a second phase input connected to said variable-frequency oscillator output, and a phase error output connected to said frequency control input for adjusting a frequency of said sinusoidal signal to be approximately equal to said resonant frequency; and

(e) a frequency-controlled filter connected between said drive signal output and said first phase input, said frequency-controlled filter having a center-frequency control input, and said phase-locked sinusoid generator having a center-frequency control output connected to said center-frequency control input for adjusting said frequency-controlled filter for a center frequency approximately equal to said frequency of said sinusoidal signal.

2. An angular-rate sensing system comprising, in combination:

(a) an angular rate sensor having a drive signal input, a drive signal output, and a rate signal output;

(1) said angular rate sensor producing at said rate signal output an angular rate signal modulated on a carrier frequency when said drive signal input is excited at said carrier frequency;

(2) said angular rate sensor having a resonant frequency at which there is approximately zero phase shift from said drive signal input to said drive signal output;

(b) a drive circuit connected to said drive signal input and said drive signal output for exciting said drive signal input at approximately said resonant frequency; and

(c) a demodulator circuit connected to said rate signal output and said drive circuit for demodulating said angular rate signal;

(d) wherein said drive circuit includes a phase-locked sinusoid generator connected to said drive signal output and said drive signal input for producing a sinusoidal signal at said drive signal input;

(1) said phase-locked sinusoid generator including a variable-frequency oscillator generating said sinusoidal signal and having a frequency control input and a variable-frequency oscillator output, said variable frequency oscillator output being connected to said drive signal input for driving said drive signal input with said sinusoidal signal, and said variable-frequency oscillator being a digital oscillator including a first delay unit and a second delay unit connected in a feedback circuit, said feedback circuit including a limiter connected to said first delay unit for limiting a value in said first delay unit, and said variable-frequency oscillator further including a reset circuit connected to said frequency control input and said second delay unit for resetting said second delay unit to a value responsive to said frequency control input when said limiter limits a value in said first delay unit; and

(2) said phase-locked sinusoid generator further including a phase detector having a first phase input connected to said drive signal output, a second phase input connected to said oscillator output, and a phase error output connected to said frequency control input for adjusting a frequency of said sinusoidal signal to be approximately equal to said resonant frequency.

3. An angular-rate sensing system comprising, in combination:

(a) an angular rate sensor having a drive signal input, a drive signal output, and a rate signal output;

(1) said angular rate sensor producing at said rate signal output an angular rate signal modulated on a carrier frequency when said drive signal input is excited at said carrier frequency;

(2) said angular rate sensor having a resonant frequency at which there is approximately zero phase shift from said drive signal input to said drive signal output;

(b) a drive circuit connected to said drive signal input and said drive signal output for exciting said drive signal input at approximately said resonant frequency; and

(c) a demodulator circuit connected to said rate signal output and said drive circuit for demodulating said angular rate signal;

(d) wherein said drive circuit includes a phase-locked sinusoid generator connected to said drive signal output and said drive signal input for producing a sinusoidal signal at said drive signal input;

(1) said phase-locked sinusoid generator including a variable-frequency oscillator generating said sinusoidal signal and having a frequency control input and an variable-frequency oscillator output, said variable-frequency oscillator output being connected to said drive signal input for driving said drive signal input with said sinusoidal signal, said variable frequency oscillator including

an oscillator controller connected to said frequency control input and producing a pair of frequency control signals that are the sine and cosine of a frequency control parameter (φ

), and

a digital oscillator responsive to said pair of frequency control signals for generating an in-phase output signal and a quadrature-phase output signal at a frequency of said sinusoidal signal,

wherein said oscillator controller has a multiplier for squaring one of said frequency control signals and a computational unit for computing the other of said frequency control signals as a Chebyshev polynomial approximation for the square root of one minus the square of said one of said frequency control signals, said Chebyshev polynomial approximation being optimized over a predetermined operating frequency band; and

(2) said phase-locked sinusoid generator further including a phase detector having a first phase input connected to said drive signal output, a second phase input connected to said oscillator output, and a phase error output connected to said frequency control input for adjusting said frequency of said sinusoidal signal to be approximately equal to said resonant frequency.

4. The angular rate sensing system as claimed in claim 3, wherein said digital oscillator includes a first delay unit, a second delay unit, first and second multipliers controlled by the sine of said frequency control parameter (φ

), and third and fourth multipliers controlled by the cosine of said frequency control parameter (φ

), wherein said first multiplier is connected to said first delay unit for controlling feedback from an input of said first delay unit to an output of said first delay unit, said second multiplier is connected to said second delay unit controlling feedback from an input of said second delay unit to an output of said second delay unit, said third multiplier is connected between said input of said first delay unit and said output of said second delay unit for controlling cross-coupling from said second delay unit to said first delay unit, said fourth multiplier is connected between said input of said second delay unit and said output of said first delay unit for controlling cross-coupling from said first delay unit to said second delay unit, and wherein said digital oscillator further includes a first roundoff compensation unit connected to said first delay unit and said second delay unit for compensating said output of said first delay unit by computing a compensated value for said output of said first delay unit as a predetermined function of said output of said second delay unit when said output of said second delay unit produces a value within predetermined limits, and wherein said digital oscillator further includes a second roundoff compensation unit connected to said first delay unit and said second delay unit for compensating said output of said second delay unit by computing a compensated value for said output of said second delay unit when said output of said first delay unit produces a value within predefined limits.

5. The angular rate sensing system as claimed in claim 4, wherein said first roundoff compensation unit computes said compensated value for said output of said first delay unit from an even polynomial of said output of said second delay unit, and wherein said second roundoff compensation unit computes said compensated value for said output of said second delay unit from an even polynomial of said output of said first delay unit.

6. A digital variable-frequency oscillator circuit comprising an oscillator controller for producing a pair of frequency control signals that the sine and cosine of a frequency control parameter (φ

) specified by a frequency control signal, and a digital oscillator responsive to said pair of frequency control signals for generating an in-phase output signal of an in-phase output and a quadrature-phase output signal at a quadrature-phase output at a controlled frequency of oscillation, wherein said oscillator controller has a multiplier for squaring one of said frequency control signals and a computational unit for computing the other of said frequency control signals as a Chebyshev polynomial approximation for the square root of one minus the square of said one of said frequency control signals, said Chebyshev polynomial approximation being optimized over a predetermined operating frequency band.

7. The digital variable-frequency oscillator circuit as claimed in claim 6, wherein said digital oscillator includes a first delay unit, a second delay unit, first and second multipliers controlled by the sine of said frequency control parameter (φ

), and third and fourth multipliers controlled by the cosine of said frequency control parameter (φ

), wherein said first multiplier is connected to said first delay unit for controlling feedback from an input of said first delay unit to an output of said first delay unit, said second multiplier is connected to said second delay unit controlling feedback from an input of said second delay unit to an output of said second delay unit, said third multiplier is connected between said input of said first delay unit and said output of said second delay unit for controlling cross-coupling from said second delay unit to said first delay unit, said fourth multiplier is connected between said input of said second delay unit and said output of said first delay unit for controlling cross-coupling from said first delay unit to said second delay unit, and wherein said digital oscillator further includes a first roundoff compensation unit connected to said first delay unit and said second delay unit for compensating said output of said first delay unit by computing a compensated value for said output of said first delay unit as a predetermined function of said output of said second delay unit when said output of said second delay unit produces a value within predetermined limits, and wherein said digital oscillator further includes a second roundoff compensation unit connected to said first delay unit and said second delay unit for compensating said output of said second delay unit by computing a compensated value for said output of said second delay unit when said output of said first delay unit produces a value within predefined limits.

8. The digital variable-frequency oscillator circuit as claimed in claim 7, wherein said first roundoff compensation unit computes said compensated value for said output of said first delay unit from an even polynomial of said output of said second delay unit, and wherein said second roundoff compensation unit computes said compensated value for said output of said second delay unit from an even polynomial of said output of said first delay unit.

9. The digital variable-frequency oscillator circuit as claimed in claim 6, further including a phase detector having a first phase input, and a second phase input connected to one of said outputs of said digital oscillator for phase-locking said digital oscillator to a reference signal on said first phase input, said phase detector having a phase-detector multiplier connected to said first phase input and said second phase input for producing a product including a phase error component and a double-frequency component, and a frequency-controlled notch filter connected to said phase-detector multiplier for filtering said product to produce a filtered signal having said double-frequency component effectively removed, and wherein said oscillator controller has an accumulator for accumulating said filtered signal to produce said frequency control signal, and wherein said frequency controlled notch filter has a frequency control input connected to said oscillator controller for adjusting a signal rejection frequency of said frequency-controlled notch filter to twice said controlled frequency of oscillation of said digital oscillator.

10. The digital variable-frequency oscillator circuit as claimed in claim 9, wherein said oscillator controller has computational units for computing said frequency control signal as effectively equal to two subtracted from four times the square of the sine of said frequency control parameter.

11. The digital variable-frequency oscillator circuit as claimed in claim 9, further including a frequency error detector having a first frequency input connected to said first phase input, a second frequency input connected to one of said oscillator outputs, and a frequency error output connected to said oscillator controller to control said digital oscillator to reduce to effectively zero any difference in frequency of said reference signal and said controlled frequency of oscillation.

12. A digital synthesizer comprising a variable-frequency digital oscillator for generating an output signal at a controlled frequency of oscillation, an oscillator controller connected to said variable-frequency digital oscillator for controlling said frequency of oscillation by producing a frequency control signal in response to a phase error signal, and a phase detector having a phase detector having a first phase input, and a second phase input connected to said variable-frequency digital oscillator for phase-locking said output signal to a reference signal on said first phase input, said phase detector having a multiplier connected to said first phase input and said second phase input for producing a product including a phase error component and a double-frequency component, and a frequency-controlled notch filter connected to said multiplier for filtering said product to produce a filtered signal having said double-frequency component effectively removed, wherein said oscillator controller has an accumulator for accumulating said filtered signal to produce said frequency control signal, and wherein said frequency-controlled notch filter has a frequency control input connected to receive said frequency control signal from said oscillator controller for adjusting a signal rejection frequency of said frequency-controlled notch filter to twice said frequency of oscillation of said variable-frequency digital oscillator.

13. The digital synthesizer as claimed in claim 12, further including a frequency error detector having a first frequency input connected to said first phase input, a second frequency input connected to an output of said variable-frequency digital oscillator, and a frequency error output connected to said oscillator controller to control said variable-frequency digital oscillator to reduce to effectively zero any difference in frequency of said reference signal and said frequency of oscillation.