Radio receiver and buffer system therefor

• US 5,463,599 A
• Filed: 08/23/1994
• Issued: 10/31/1995
• Est. Priority Date: 08/23/1994
• Status: Expired due to Fees

• Current Assignee: Aharon Yifrach, David S. Newman
• Original Assignee: Aharon Yifrach, David S. Newman
• Inventors: Newman, David S., Yifrach, Aharon
• Primary Examiner(s): Gonzalez, Frank
• Assistant Examiner(s): DINH, TAN X
• Application Number:
  US08/294,743
• Time in Patent Office: 434 Days
• Field of Search: 369/7, 369/6, 360/7, 360/5, 455/345, 455/89, 455/186.1, 455/186.2, 381/34, 381/35, 381/36, 381/31, 379/88
• US Class Current: 369/7
• CPC Class Codes: G11C 2207/16 Solid state audio deprecated, only for historical reasons, G06F3/16, G11B
• CPC Class Codes: G11C 7/16 Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters
• CPC Class Codes: H04H 60/27 Arrangements for recording or accumulating broadcast information or broadcast-related information

Abstract

A buffer system for radio receivers includes an analog-to-digital converter, a digital cyclic storage device for continuously storing in digital form the audio signals last outputted thereby over a predetermined time interval, and a control circuit including a mode selector switch to select a Skip Mode, in which the receiver audio circuit receives the signals from the cyclic storage device with a slowly increasing delay from real-time, and another switch to connect the audio circuit to receive the audio signals real-time, and thus to skip a part of the broadcasted information. The mode selector may also select a Standby Mode for storing information broadcasted before the receiver has been turned on, and/or a Forward Mode for storing information broadcasted after the receiver has been turned off.

Claims

1. A buffer system for radio receivers having a processing circuit outputting audio signals to an audio analog circuit for reproduction as sounds, said buffer system comprising:

an analog-to-digital converter for converting to digital form the analog signals outputted by the processing circuit;

a digital cyclic storage device connected to the processing circuit for continuously storing in digital form the audio signals last outputted thereby over a predetermined time interval;

and a control circuit including a mode selector comprising;

a Skip-Mode manual switch actuatable to select a Skip Mode, in which the audio circuit is connected to receive the signals from the cyclic storage device at first with a slowly increasing delay from real-time such as not to unduly distort the audio signals until the delay reaches the predetermined time interval of the cyclic storage device, and thereafter with a delay from real-time equal to that of the predetermined time interval of the cyclic storage device;

and a Skip manual switch actuatable to connect the audio circuit to receive the audio signals from the processing circuit in real-time, and thus to skip the portion of the audio signals from the processing circuit equal to that of said predetermined time interval of the cyclic storage device.

2. The buffer system according to claim 1, wherein said predetermined time delay is about one minute.

3. The buffer system according to claim 1, wherein said mode selector further includes:

a Standby manual switch actuatable to select a Standby Mode, in which the cyclic storage device is connected to said processing circuit to store the audio signals therein even when the radio receiver is otherwise turned off.

4. The buffer system according to claim 3, wherein said control circuit further includes a visual indicator which is energized when said Standby Mode is selected.

5. The buffer system according to claim 3, wherein the radio receiver is battery operated, and said control circuit further includes a Standby timer effective to turn-off the complete radio receiver after a long predetermined time interval of operation under said Standby Mode.

6. The buffer system according to claim 5, wherein said long predetermined time interval is at least ten hours.

7. The buffer system according to claim 1, wherein said mode selector further includes:

a Forward-Mode manual switch actuatable to select a Forward Mode, in which the cyclic storage device is connected to said processing circuit to store the signals therein for a predetermined time interval immediately after the radio receiver has been turned off.

8. The buffer system according to claim 7, wherein said control circuit further includes a visual indicator which is energized when said Forward Mode is selected.

9. The buffer system according to claim 1, wherein said mode selector further includes a Mode-Selector manual switch to select either:

(a) a Normal Listening Mode, wherein the audio circuit is connected to receive the audio signals from the processing circuit in a real-time manner, while the cyclic storage device continuously stores the audio signals last outputted by the processing circuit over said predetermined time interval;

or

(b) at least one other mode wherein the audio circuit is connected to receive the signals previously stored in the cyclic storage device.

10. The buffer system according to claim 9, wherein said at least one other mode is a Delayed-Listening Mode, wherein the audio circuit is connected to receive the audio signals in a delayed-time manner from the processing circuit via the cyclic storage device.

11. The buffer system according to claim 9, wherein the buffer system also includes a further storage device capable of storing all the information stored in the cyclic storage device during said predetermined time interval;

and wherein said at least one other mode includes;

(i) a Freeze Mode, wherein the cyclic storage device is connected to the further storage device to transfer its contents to the further storage device while the cyclic storage device continues to store the audio signals last outputted by the processing circuit over said predetermined time interval; and

(ii) a Playback Mode, wherein the audio circuit is connected to the further storage device to be fed the contents of the further storage device.

20. A radio receiver comprising:

a processing circuit outputting audio signals;

an audio circuit for reproducing the audio signals in the form of sounds;

and a buffer system according to claim 1 for controlling the audio circuit.

12. A buffer system for radio receivers having a processing circuit outputting audio signals to an audio analog circuit for reproduction as sounds, said buffer system comprising:

an analog-to-digital converter for converting to digital form the analog signals outputted by the processing circuit;

a digital cyclic storage device connected to the processing circuit for continuously storing in digital form the audio signals last outputted thereby over a predetermined time interval;

and a control circuit including a mode selector comprising;

a Mode-Selector manual switch actuatable to select either (i) a Normal-Listening Mode, wherein the audio circuit is connected to receive the audio signals from the processing circuit in a real-time manner, while the cyclic storage device continuously stores the audio signals last outputted by the demodulator circuit over a predetermined time interval;

or (ii) at least one other mode wherein the audio circuit is connected to receive the signals previously stored in the cyclic storage device;

and a Standby manual switch actuatable to select a Standby Mode to connect the cyclic storage device to said processing circuit to store the audio signals therein even when the radio receiver is otherwise turned off.

13. The buffer system according to claim 12, wherein said mode selector further includes:

a Skip-Mode manual switch actuatable to select a Skip Mode, in which the audio circuit is connected to receive the signals from the cyclic storage device at first with a slowly increasing delay from real-time such as not to unduly distort the audio signals until the delay reaches the predetermined time interval of the cyclic storage device, and thereafter with a delay from real-time equal to that of the predetermined time interval of the cyclic storage device;

and a Skip manual switch actuatable to connect the audio circuit to receive the audio signals from the processing circuit in real-time, and thus to skip the portion of the audio signals from the processing circuit equal to that of said predetermined time interval of the cyclic storage device.

14. The buffer system according to claim 12, wherein said at least one other mode is a Delayed-Listening Mode, wherein the audio circuit is connected to receive the audio signals in a delayed-time manner from the processing circuit via the cyclic storage device.

15. The buffer system according to claim 12, wherein the buffer system also includes a further storage device capable of storing all the information stored in the cyclic storage device during said predetermined time interval;

and wherein said at least one other mode includes;

(i) a Freeze Mode, wherein the cyclic storage device is connected to the further storage device to transfer its contents to the further storage device while the cyclic storage device continues to store the audio signals last outputted by the processing circuit over said predetermined time interval; and

(ii) a Playback Mode, wherein the audio circuit is connected to the further storage device to be fed the contents of the further storage device.

16. A buffer system for radio receivers having a processing circuit outputting audio signals to an audio analog circuit for reproduction as sounds, said buffer system comprising:

an analog-to-digital converter for converting to digital form the analog signals outputted by the processing circuit;

a digital cyclic storage device connected to the processing circuit for continuously storing in digital form the audio signals last outputted thereby over a predetermined time interval;

and a control circuit including a mode selector comprising;

a Mode-Selector manual switch actuatable to select either (i) a Normal-Listening Mode, wherein the audio circuit is connected to receive the audio signals from the processing circuit in a real-time manner, while the cyclic storage device continuously stores the audio signals last outputted by the demodulator circuit over a predetermined time interval;

or (ii) at least one other mode wherein the audio circuit is connected to receive the signals previously stored in the cyclic storage device;

and a Forward-Mode manual switch actuatable to select a Forward Mode, in which the cyclic storage device is connected to said processing circuit to store the signals therein for a predetermined time interval immediately after the radio receiver has been turned off.

17. The buffer system according to claim 16, wherein said mode selector further includes:

a Skip-Mode manual switch actuatable to select a Skip Mode, in which the audio circuit is connected to receive the signals from the cyclic storage device at first with a slowly increasing delay from real-time such as not to unduly distort the audio signals until the delay reaches the predetermined time interval of the cyclic storage device, and thereafter with a delay from real-time equal to that of the predetermined time interval of the cyclic storage device;

and a Skip manual switch actuatable to connect the audio circuit to receive the audio signals from the processing circuit in real-time, and thus to skip the portion of the audio signals from the processing circuit equal to that of said predetermined time interval of the cyclic storage device.

18. The buffer system according to claim 16, wherein said at least one other mode is a Delayed-Listening Mode, wherein the audio circuit is connected to receive the audio signals in a delayed-time manner from the processing circuit via the cyclic storage device.

19. The buffer system according to claim 16, wherein the buffer system also includes a further storage device capable of storing all the information stored in the cyclic storage device during said predetermined time interval;

and wherein said at least one other mode includes;

(i) a Freeze Mode, wherein the cyclic storage device is connected to the further storage device to transfer its contents to the further storage device while the cyclic storage device continues to store the audio signals last outputted by the processing circuit over said predetermined time interval;

or

(ii) a Playback Mode, wherein the audio circuit is connected to the further storage device to be fed the contents of the further storage device.