Method and apparatus for unwinding image data

• US 5,511,151 A
• Filed: 06/10/1992
• Issued: 04/23/1996
• Est. Priority Date: 06/10/1992
• Status: Expired due to Term

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Information Systems Incorporated (Canon Inc.)
• Inventors: Russell, William C., Ip, Tony K., Emerson, H. Brad
• Primary Examiner(s): Powell, Mark R.
• Assistant Examiner(s): SAX, STEVEN PAUL
• Application Number:
  US07/896,367
• Time in Patent Office: 1,413 Days
• Field of Search: 348/441, 348/450, 395/114, 395/115
• US Class Current: 358/1.15
• CPC Class Codes: G06K 15/10 by matrix printers G06K15/028 takes precedence
• CPC Class Codes: G06K 2215/0014 Transforming the printer input data into internal codes
• CPC Class Codes: G06K 2215/0077 Raster outputting to the print element(s)

Abstract

Method and apparatus for converting image data from row format into column format and a printer incorporating the same. A conversion circuit, which is responsive to writes to a first address space, is provided for converting the image data from the row format into the column format. A CPU writes the row format image data to the first address space whereupon the conversion circuit converts it to the second format. The CPU then writes image data to a second address space. In accordance with an unwind flag set by the CPU, either the converted image data or the original image data is stored in a memory. After the data has been written to memory, the CPU initiates a DMA transfer of the image data to a printer engine.

Claims

1. Apparatus for reformatting image data comprising:

a memory partitioned into at least a first address space which corresponds to physical memory for storing image data having one of a row format and a column format, a second address space which does not correspond to physical memory and a third address space which corresponds to physical memory for storing reformatted image data;

writing means for writing a predetermined N×

N block of the image data having one of the row format and the column format from the first address space to the second address space so as to initiate conversion of the predetermined N×

N block of image data to the other of the row format and the column format, and for subsequently writing the predetermined N×

N block of image data to the third address space;

converting means which, in response to the image data being written to the second address space, converts the predetermined N×

N block of image data from the one of the row format and the column format into the other of the row format and the column format; and

outputting means responsive to said writing means writing to the third address space, for storing the predetermined N×

N block of image data which has been converted by said converting means into the other of the row format and the column format, to said memory at the third address space.

2. Apparatus according to claim 1, further comprising selection means for selecting one of the row format and the column format, and a second output means responsive to said writing means writing to the third address space for outputting the predetermined N×

N block of image data in the one of the row format and the column format, wherein said output means and said second output means are complementarily responsive to said selection means.

3. Apparatus according to claim 2, further comprising means for accepting commands over an interface, wherein said selection means is responsive to a command for selecting the one of the row format and the column format.

4. Apparatus according to claim 1, further comprising a interface, wherein said writing means is adapted to accept image data from said interface.

5. Apparatus according to claim 4, wherein at least some of the image data is compressed and wherein said writing means is adapted to decompress the compressed image data.

6. Apparatus according to claim 5, further comprising a bit map memory, wherein said writing means is adapted to store the decompressed image data in said bit map memory.

7. Apparatus according to claim 1, wherein said output means comprises a DMA output channel.

8. Apparatus according to claim 7, wherein said DMA channel is double buffered.

9. Apparatus according to claim 1, further comprising a printer and a printer engine, wherein said printer includes a print head adapted to print plural rows simultaneously.

10. Apparatus according to claim 1, wherein said converting means comprises plural latches for latching respective bytes of image data in the one of the row format and the column format, and plural buffers, each of which is connected to each of said plural latches, for converting image data into the other of the row format and the column format.

11. Apparatus according to claim 10, wherein there are N latches and N buffers.

12. Apparatus according to claim 10, further comprising a first multiplexer for activating one of said plural latches based on address data, and a second multiplexer for activating one of said plural buffers based on address data.

13. Apparatus according to claim 12, wherein said first multiplexer is responsive to least significant bits of address data and wherein said second multiplexer is responsive to next least significant bits.

14. A method for printing image data comprising the steps of:

receiving image data and commands;

storing the received image data in one of a row format and a column format at a first address space which corresponds to physical memory;

writing a predetermined N×

N block of the stored image data to a second address space which does not correspond to physical memory, so as to initiate conversion of the predetermined N×

N block of image data to the other of the row format and the column format;

converting the predetermined N×

N block of image data written to the second address space to the other of the row format and the column format;

writing to a third address space which corresponds to physical memory for storing reformatted image data;

storing the predetermined N×

N block of image data converted in said step of converting in the third address space in response to writing to the third address space; and

printing the predetermined N×

N block of image data stored in said step of storing.

15. A method according to claim 14, further comprising the step of selecting to store, in said step of storing, one of the predetermined N×

N block of image data in the one of the row format and the column format and the predetermined N×

N block of image data in the other of the row format and the column format.

16. A method according to claim 14, further comprising the steps of separating image data from commands and storing the image data in a bit map memory.

17. A method according to claim 16, wherein at least some of the image data is compressed image data and further comprising the step of decompressing the compressed image data.

18. An apparatus for converting row-formatted image data into column-formatted image data comprising:

a memory partitioned into a first address space corresponding to physical memory which stores row-formatted image data, a second address space which does not correspond to physical memory and a third address space which corresponds to physical memory which stores reformatted image data;

a processor which initiates N writes to the second address space so as to write a predetermined N×

N block of the row-formatted image data from the first address space to the second address space, thereby to initiate conversion of the predetermined N×

N block of the row-formatted image data into column-formatted image data, and which subsequently initiates N writes to the third address space so as to write the column-formatted image data to the third address space;

a first multiplexer, responsive to said processor writing the predetermined N×

N block of image data to the second address space, which decodes M least significant bits of address data to provide N sequential latch enable signals;

N latches, each of which is responsive to one of the N sequential latch enable signals provided by said first multiplexer, which latch the predetermined N×

N block of row-formatted image data;

a second multiplexer, responsive to said processor writing to the third address space, which decodes next M consecutive least significant bits of address data to provide N sequential buffer control signals;

N buffers which receive and buffer the column-formatted image data, and which store the column-formatted image data in response to one of the N sequential buffer control signals provided by said second multiplexer; and

interconnection wiring interposed between said N latches and said N buffers, over which, for each of the N latches, an Ith bit is transferred to an Ith of the N buffers and stored in an Ith position in the Ith buffer, in response to the N latch enable signals, where I≦

N.

19. An apparatus according to claim 18, wherein a number of said N latches is 2^M and a number of said N buffers is 2^M, and wherein 2^M corresponds to a number of bytes comprising the predetermined N×

N block of image data written from the first address space to the second address space.