Television receiver capable of enlarging and compressing image
DC CAFCFirst Claim
1. A television receiver capable of enlarging and compressing an image comprising:
- a memory having a storage capacity not less than a given value which is controlled with at least a line period;
a clock generator generating a clock having a frequency not less than that of a write clock signal from a writing clock for writing a video signal in said memory and for outputting a read clock for reading said written video signal from said memory;
a vertical enlargement controller generating and outputting a signal for controlling said memory to repeatedly read the same line with a line period depending upon a first preset value when said video signal is read from said memory;
a horizontal enlargement controller generating and outputting a signal for controlling said memory to repeatedly read the same pixel from said memory with a predetermined pixel period depending upon a second preset value when said video signal is read from said memory;
means for combining the output signal from said vertical enlargement controller, the output signal from said horizontal enlargement controller and the read clock from said clock generator and for supplying said memory with a combined signal;
to thereby provide a video signal representing an image which is compressed and enlarged in horizontal and vertical directions to a desired size as a video signal read from said memory.
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Accused Products
Abstract
To provide an image which is matched with an aspect ratio of a screen of a display unit by compressing and enlarging the whole of the image to a desired size. A video signal is sequentially written into a field memory in response to a write clock from an input terminal. A clock generating circuit supplies the field memory with a read clock having a frequency which is about 4/3 times as high as that of the write clock. A vertical enlargement control circuit reads a video signal from the field memory with a line period corresponding to a magnification factor and inhibits writing to a one-line memory with the same period to provide a line delayed output for an output signal from the field memory. A vertical interpolating circuit generates a scanning line signal by an interpolation operation in accordance with a control signal from the vertical enlargement control circuit.
61 Citations
6 Claims
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1. A television receiver capable of enlarging and compressing an image comprising:
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a memory having a storage capacity not less than a given value which is controlled with at least a line period; a clock generator generating a clock having a frequency not less than that of a write clock signal from a writing clock for writing a video signal in said memory and for outputting a read clock for reading said written video signal from said memory; a vertical enlargement controller generating and outputting a signal for controlling said memory to repeatedly read the same line with a line period depending upon a first preset value when said video signal is read from said memory; a horizontal enlargement controller generating and outputting a signal for controlling said memory to repeatedly read the same pixel from said memory with a predetermined pixel period depending upon a second preset value when said video signal is read from said memory; means for combining the output signal from said vertical enlargement controller, the output signal from said horizontal enlargement controller and the read clock from said clock generator and for supplying said memory with a combined signal;
to thereby provide a video signal representing an image which is compressed and enlarged in horizontal and vertical directions to a desired size as a video signal read from said memory. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification