Emulator and digital signal analyzer

• US 5,541,862 A
• Filed: 04/28/1994
• Issued: 07/30/1996
• Est. Priority Date: 04/28/1994
• Status: Expired due to Fees

• Current Assignee: Wandel & Goltermann ATE Systems Limited
• Original Assignee: Wandel & Goltermann ATE Systems Limited
• Inventors: Jansen, Peter H., Nagaraj, Vijay K., Bright, Randall G.
• Primary Examiner(s): Voeltz, Emanuel T.
• Assistant Examiner(s): VO, HIEN XUAN
• Application Number:
  US08/234,854
• Time in Patent Office: 824 Days
• Field of Search: 364/485, 364/486, 364/487, 364/580, 364/578, 364/579, 364/131, 364/134, 395/500, 395/650, 395/725, 395/775, 395/183.04, 324/73.1, 324/158.1
• US Class Current: 702/122
• CPC Class Codes: G06F 9/455 Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines

Abstract

In order to test the functional and parametric characteristics of a unit without overloading a host computer, the host computer downloads a testing program to a plurality of digital signal processor modules which do all of the functional environmental emulation data generation and analysis of the data received from the unit under test. A reconfigurable application interface module is also programmed at the same time as the digital signal processor modules and is thus configured to accept basic emulation data generated by the digital signal processor modules and convert those data to the data environment that the unit under test is expected to experience in use. The application interface module also converts the data received from the unit under test into a format that the digital signal processor modules can analyze, the results of which analysis are made available to the host computer.

Claims

1. An emulator and digital signal analyzer for automatic functional and parametric testing of a unit under test, within a simulation of that unit'"'"'s normal functional data environment, comprising:

a plurality of digital signal processors, each said digital signal processor responding to said digital signal processor'"'"'s own series of stored program steps simultaneously with at least one other of the digital signal processors responding to said other digital signal processor'"'"'s own series of stored program steps for cooperating in the generation of a sequence of digital representations of the operating environment of the unit and for analysis of data signals from the unit under test, for comparison with what should normally be received from the unit under test;

means for translating the outputs of the digital signal processors into a representation of a normal data signal environment of the unit under test;

shared resources available to all of the digital signal processors;

common means for each digital signal processor to communicate with the shared resources and with every other digital signal processor in the emulator; and

means for arbitrating between the digital signal processors whenever at least two of them are trying to utilize the common means in order to access or receive from the shared resources, to withhold access from one digital signal processor and permit access to another digital signal processor.

2. An emulator and digital signal analyzer according to claim 1 wherein the generating means comprises at least one digital signal processor responding to a series of stored program steps.

3. An emulator and digital signal analyzer according to claim 1 further comprising:

means for delivering to the unit under test data signals calculated to test the functional performance of said unit under test in the normal data signal operating conditions of the unit under test.

4. An emulator and digital signal analyzer according to claim 1 further including a bus for interconnecting the digital signal processors, wherein each digital signal processor comprises:

a single digital signal processor integrated circuit;

at least one random access memory devices for storing programming for operating only that single digital signal processor integrated circuit;

a bus interface to link the digital signal processor to the bus, and

means on each digital signal processor integrated circuit for directly connecting that digital signal processor integrated circuit to the digital signal processor integrated circuit of every other digital signal processor.

5. An emulator and digital signal analyzer according to claim 4, further including:

a shared memory connected to the bus and usable by every digital signal processor.

6. An emulator and digital signal analyzer according to claim 5, wherein the translating means comprises:

An application interface module having;

means for storing the data received from the digital signal processors for the unit under test and for storing the data received from the unit under test for the digital signal processors;

means for processing and converting data from the digital signal processors to a format expected by the unit under test in the normal operating environment of the unit under test; and

means for preprocessing the data received from the unit under test and converting it into a form for analysis by the digital signal processor.

7. An emulator and digital signal analyzer for emulating data signals that a unit under test would expect to receive and for digitally analyzing the data signals generated by the unit under test, comprising:

a plurality of programmable digital signal processors for generating data and for receiving and analyzing data for functional and parametric testing of at least one unit under test;

means for formatting the data signals passing from the digital signal processors to the unit under test and from the unit under test to the digital signal processors, so as to emulate the unit under test'"'"'s normal digital operating environment; and

means for electronically reconfiguring the nature of the operation of the formatting means for adaptation to different types of units under test.

8. An emulator and digital signal analyzer according to claim 7 further comprising:

programmable means for steering data between the digital signal processors and a selected one or more of a plurality of units under test.

9. An emulator and digital signal analyzer according to claim 7 wherein the formatting means includes:

means for the synthesizing the data rate that the unit under test expects in the normal environment of the unit under test.

10. An emulator and digital signal analyzer according to claim 7 further comprising:

means for providing simultaneous write/read access by one or more of the digital signal processors to the transmit/receive data streams passing between the digital signal processors and the unit under test.

11. An emulator and digital signal analyzer according to claim 7 further comprising:

supplemental means for adapting the signals to a plurality of signal environments that differ from the signal environment in which the emulator and digital signal analyzer operates.

12. An emulator and digital signal analyzer for emulating the data signals that a unit under test would expect to receive and for digitally analyzing the data signals generated by the unit under test, comprising:

a host computer having resident therein programs for the testing of a plurality of units under test and through which a command to conduct a test can be transmitted;

a digital signal generator and analyzer comprising a plurality of digital signal processors for generating data and for receiving and analyzing data for functional and parametric testing of at least one unit under test, all generation of data for delivery to the unit under test and all processing of the data received from the unit under test for analysis thereof being performed by the digital signal generator and analyzer, with the results of said analysis being retrieved by the host computer from the digital signal analyzer;

memory means associated with the digital signal processors for storing the program for testing a specific type of unit under test;

means for receiving from the host computer and for storing in the memory associated with the digital signal processors the program for testing a specific type of unit under test; and

means for formatting the data signals passing from the digital signal processors to the unit under test and from the unit under test to the digital signal processors, so as to emulate the unit under test'"'"'s normal digital operating environment.

13. An emulator and digital signal analyzer according to claim 12 further comprising:

means for communicating between the host computer and each individual DSP.

14. An emulator and digital signal analyzer according to claim 12 further comprising:

means for providing access to the memory associated with each digital signal processor by the host computer or any other digital signal processor.

15. An emulator and digital signal analyzer according to claim 12 wherein:

each digital signal processor is equipped with a dedicated random access memory;

means for granting the host computer direct access to the contents of the dedicated random access memory of a digital signal processor by inhibiting the digital signal processors access to the dedicated random access memory until the host computer has completed its access.