Diversity receiving apparatus

• US 5,559,838 A
• Filed: 11/16/1995
• Issued: 09/24/1996
• Est. Priority Date: 12/01/1993
• Status: Expired due to Term

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Nakagoshi, Arata
• Primary Examiner(s): TSE, YOUNG TOI
• Application Number:
  US08/558,483
• Time in Patent Office: 313 Days
• Field of Search: 375/267, 375/347, 455/133-136, 455/277.1, 455/277.2, 370/95.1, 370/95.3
• US Class Current: 375/347
• CPC Class Codes: H04B 7/082 selecting best antenna path
• CPC Class Codes: H04L 1/06 using space diversity

Abstract

A diversity receiving apparatus includes a plurality of receivers, each of which receives a plurality of signals and includes a detector which selects and outputs a desired signal from the received signals, and a delay circuit which delays the desired signal to produce a delayed signal. A level comparator compares signal levels of the desired signals outputted from the detectors with one another, and produces an output indicating which one of the desired signals has a highest signal level. A selector responsive to the output of the level comparator selects and outputs the delayed signal produced by the delay circuit delaying the desired signal having the highest signal level. A demodulator demodulates the selected delayed signal. A power controller supplies power to the level comparator and all of the receivers at a preset level comparison period, continues to supply power to the receiver including the detector outputting the desired signal having the highest signal level after the level comparator has finished comparing the signal levels of the desired signals with one another until a next level comparison period, and stops supplying power to the level comparator and all of the receivers except the receiver including the detector outputting the desired signal having the highest signal level after the level comparator has finished comparing the signal levels of the desired signals with one another until the next level comparison period.

Claims

1. A diversity receiving apparatus for selecting and extracting a received signal of a good receiving state from a plurality of received signals, comprising:

a plurality of receivers each of which is constructed by a detector for selecting a desired signal from said received signals and a demodulator for demodulating the selected signal;

a level comparator for comparing each received signal level of the signal selected by each of said detectors of said plurality of receivers;

a selector for selecting a demodulated signal from said demodulator of the receiver having the high received signal level on the basis of the comparison result in said level comparator and for outputting the selected demodulated signal; and

a power controller for controlling a power supply to said plurality of receivers and said level comparator,

wherein said power controller supplies electric powers to all of said receivers and said level comparator in accordance with a preset period of the comparison of the received signal levels and continues only the power supply to the receiver having the high received signal level on the basis of the comparison result in said level comparator and stops the power supply to the receivers other than said receiver having the high received signal level and to said level comparator.

2. An apparatus according to claim 1, wherein each of said receiver comprises a delay circuit which is provided at the post stage of said demodulator and delays the signal demodulated by said demodulator.

3. An apparatus according to claim 2, wherein said delay circuit has a delay time according to a time which is required for the comparison of the received signal levels in said level comparator.

4. An apparatus according to claim 1, wherein each of said receivers comprises a delay circuit which is provided between said detector and said demodulator and delays the signal selected by said detector.

5. An apparatus according to claim 4, wherein said delay circuit has a delay time according to a time which is required for the comparison of the received signal levels in said level comparator.

6. A diversity receiving apparatus which is used in a digital communication system using a time division multiple access system for selecting and extracting a received signal of a good receiving state from a plurality of received signals, comprising:

a plurality of receivers each of which is constructed by a detector for selecting the signal of a desired slot from the received signals of said time division multiple access system and a demodulator for demodulating the signal of the selected slot;

a level comparator for comparing each received signal level of the signal of the slot selected by each of said detectors of said plurality of receivers;

a selector for selecting a demodulated signal from the demodulator of the receiver having the high received signal level on the basis of the comparison result in said level comparator and for outputting the selected demodulated signal; and

a power controller for controlling a power supply to said plurality of receivers and said level comparator,

wherein said power controller executes the power supply to all of said receivers and said level comparator in a head portion of the slot at which the reception is desired in accordance with a frame period of said time division multiple access system, continues only the power supply to the receiver having the high received signal level on the basis of the comparison result in said level comparator, and stops the power supply to the receivers other than the receiver having the high received signal level and to said level comparator.

7. An apparatus according to claim 6, wherein each of said receivers further comprises a delay circuit which is provided at a post stage of said demodulator and delays the signal demodulated by said demodulator.

8. An apparatus according to claim 7, wherein said delay circuit has a delay time according to a time which is required for the comparison of the received signal levels in said level comparator.

9. An apparatus according to claim 6, wherein each of said receivers comprises a delay circuit which is provided between said detector and said demodulator and delays the signal of the slot selected by said detector.

10. An apparatus according to claim 9, wherein said delay circuit has a delay time according to a time which is required for the comparison of the received signal levels in said level comparator.

11. A diversity receiving apparatus for selecting and extracting a received signal of a good receiving state from a plurality of received signals, comprising:

a plurality of receivers each of which is constructed by a detector for selecting a desired signal from said received signals and a demodulator for demodulating the selected signal;

a level comparator for comparing each of the received signal levels of the signal selected by each of said detectors of said plurality of receivers;

a selector for selecting a demodulated signal from said demodulator of the receiver having the high received signal level on the basis of the comparison result in said level comparator and for outputting the selected demodulated signal;

a data processor for storing the detection result of the past received signal level, for analyzing an aging change of the detection result of the received signal level, and for deciding a period of the comparison of the received signal levels in accordance with an aging fluctuation amount of the received signal level; and

a power controller for controlling a power supply to said plurality of receivers and said level comparator,

wherein said power controller executes the power supply to all of said receivers and said level comparator in accordance with the period of the comparison of the received signal levels decided by said data processor, continues only the power supply to the receiver having the high received signal level on the basis of the comparison result in said level comparator, and stops the power supply to the receivers other than the receiver having the high received signal level and to said level comparator.

12. An apparatus according to claim 11, wherein each of said receivers comprises a delay circuit which is provided at the post stage of said demodulator and delays the signal demodulated by said demodulator.

13. An apparatus according to claim 12, wherein said delay circuit has a delay time according to a time which is required for the comparison of the received signal levels in said level comparator.

14. An apparatus according to claim 11, wherein each of said receivers comprises a delay circuit which is provided between said detector and said demodulator and delays the signal selected by said detector.

15. An apparatus according to claim 14, wherein said delay circuit has a delay time according to a time which is required for the comparison of the received signal levels in said level comparator.

16. A diversity receiving apparatus which is used in a digital communication system using a time division multiple access system for selecting and extracting a received signal of a good receiving state from a plurality of received signals, comprising:

a plurality of receivers each of which is constructed by a detector for selecting the signal of a desired slot from the received signals of said time division multiple access system and a demodulator for demodulating the signal of the selected slot;

a level comparator for comparing each of the received signal levels of the signal of the slot selected by each of said detectors of said plurality of receivers;

a selector for selecting a demodulated signal from said demodulator of the receiver having the high received signal level on the basis of the comparison result in said level comparator and for outputting the selected demodulated signal;

a data processor for storing the detection result of the past received signal level, for analyzing an aging change of the detection result of the received signal level, and for deciding a period of the comparison of the received signal levels corresponding to a period which is (n) times (n=1, 2, 3, . . . ) as long as a frame period of said time division multiple access system in accordance with an aging fluctuation amount of the received signal level; and

a power controller for controlling a power supply to said plurality of receivers and said level comparator,

wherein said power controller executes the power supply to all of said receivers and said level comparator in a head portion of the slot at which the reception is desired in accordance with the period of the comparison of the received signal levels decided by said data processor, continues only the power supply to the receiver having the high received signal level on the basis of the comparison result in said level comparator, and stops the power supply to the receivers other than the receiver having the high received signal level and to said level comparator.

17. An apparatus according to claim 16, wherein each of said receivers comprises a delay circuit which is provided at a post stage of said demodulator and delays the signal demodulated by said demodulator.

18. An apparatus according to claim 17, wherein said delay circuit has a delay time according to a time which is required for the comparison of the received signal levels in said level comparator.

19. An apparatus according to claim 16, wherein each of said receivers comprises a delay circuit which is provided between said detector and said demodulator and delays the signal selected by said detector.

20. An apparatus according to claim 19, wherein said delay circuit has a delay time according to a time which is required for the comparison of the received signal levels in said level comparator.