Memory architecture and devices, systems and methods utilizing the same

  • US 5,568,431 A
  • Filed: 09/21/1995
  • Issued: 10/22/1996
  • Est. Priority Date: 09/12/1994
  • Status: Expired due to Term
First Claim
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1. A memory device comprising:

  • a plurality of arrays of memory cells;

    a plurality of registers, each of said registers for exchanging parallel bits of data with a corresponding one of said arrays; and

    data transfer circuitry for transferring parallel bits of data from any selected one of said arrays through the corresponding said register to any other selected one of said arrays through the corresponding said register.

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