CCD signal read-out circuit free from ailiasing of high-frequency noises

• US 5,572,155 A
• Filed: 06/07/1995
• Issued: 11/05/1996
• Est. Priority Date: 06/20/1994
• Status: Expired due to Term

• Current Assignee: Fujifilm Corporation (Fujifilm Holdings Corporation)
• Original Assignee: Fuji Photo Film Co Limited (Fujifilm Holdings Corporation)
• Inventors: Tamayama, Hiroshi
• Primary Examiner(s): Callahan, Timothy P.
• Assistant Examiner(s): TON, MY TRANG
• Application Number:
  US08/474,670
• Time in Patent Office: 517 Days
• Field of Search: 327/91, 327/94, 327/96, 348/241, 348/242, 348/250, 348/266, 348/320, 348/321, 348/322, 348/323
• US Class Current: 327/94
• CPC Class Codes: G11C 27/02 Sample-and-hold arrangements G11C27/04 takes precedence
• CPC Class Codes: H04N 25/616 involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
• CPC Class Codes: H04N 25/71 Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array

Abstract

A CCD signal read-out circuit is operative, upon receipt of a CCD signal outputted from a CCD, to output an output signal from which a reset noise has been removed through correlated double sampling. The CCD signal includes pixel periods each comprising a reset period, a succeeding feed-through period and a further succeeding pixel signal period. The read-out circuit comprises: first and second signal extractors for receiving the CCD signal and extracting a feed-through signal and a pixel signal for the respective pixel periods, respectively; first and second low-pass filters for low-pass filtering the feed-through signal and the pixel signal extracted by the first and second signal extractors, respectively; a signal hold circuit for sampling and holding the feed-through signal filtered by the first low-pass filter; and a differential amplifier for subtracting the pixel signal filtered by the second low-pass filter from a signal sampled and held by a signal hold circuit and outputting the resultant output signal.

Claims

1. A charge coupled device (CCD) signal read-out circuit for receiving a first signal output from a CCD and for substantially removing a reset noise from the first signal by correlated double sampling to produce a second signal that is substantially free from the reset noise, the first signal including a plurality of pixel periods each pixel period comprising a reset period, a feed-through period, and a pixel signal period, said CCD signal read-out circuit comprising:

first and second signal extractor circuits for receiving the first signal and extracting a feed-through signal and a pixel signal from each respective pixel period;

first and second low-pass filter circuits for low-pass filtering the feed-through signal and the pixel signal extracted by said first and second signal extractor circuits, respectively;

a signal hold circuit for sampling and holding the feed-through signal filtered by said first low-pass filter circuit; and

a differential amplifier for subtracting the pixel signal filtered by said second low-pass filter circuit from a signal sampled and held by said signal hold circuit and outputting a resultant signal as the second signal.

2. A CCD signal read-out circuit according to claim 1, wherein said CCD is a color image sensor for producing a plurality of color signals, and wherein said CCD signal read-out circuit is provided for each of color signal.

3. A charge-coupled device (CCD) signal read-out circuit for receiving a first signal outputted from a CCD, and substantially removing a reset noise from the first signal by correlated double sampling to produce a second signal that is substantially free from reset noise, the first signal including a plurality of pixel period each pixel period comprising a reset period, a feed-through period, and a pixel signal period, said CCD signal read-out circuit comprising:

first and second signal extractor circuits for receiving the first signal and extracting a feed-through signal and an associated pixel signal from each respective pixel period;

first and second low-pass filter circuits for low-pass filtering the feed-through signal and the pixel signal extracted by said first and second signal extractor circuits, respectively;

a delay circuit for delaying the feed-through signal filtered by said first low-pass filter circuit until the associated pixel signal period comes; and

a differential amplifier for subtracting the pixel signal filtered by said second low-pass filter circuit from a signal delayed by said delay circuit and outputting a resultant signal as the second signal.

4. A CCD signal read-out circuit according to claim 3, wherein said CCD is a color image sensor for producing a plurality of color signals, and wherein said CCD signal read-out circuit is provided for each of color signal.

5. A charge-coupled device (CCD) signal read-out circuit for receiving a first signal outputted from a CCD, and substantially removing a reset noise from the first signal by correlated double sampling to produce a second signal that is substantially free from the reset noise, the first signal including a plurality of pixel periods, each comprising a reset period, a feed-through period, and a pixel signal period, said CCD signal read-out circuit comprising:

a delay circuit for delaying the first signal until a pixel signal period comes and producing a delayed signal;

a first signal extractor circuit for receiving the delayed signal and extracting a feed-through signal from each pixel period;

a second signal extractor circuit for receiving the first signal and extracting the pixel signal from each pixel period;

first and second low-pass filter circuits for low-pass filtering the feed-through signal and the pixel signal extracted by said first and second signal extractor circuits, respectively; and

a differential amplifier for subtracting the pixel signal filtered by said second low-pass filter circuit from the feed-through signal filtered by said first low-pass filter circuit and outputting a resultant signal as the second signal.

6. A CCD signal read-out circuit according to claim 5, wherein said CCD is a color image sensor for producing a plurality of color signals, and wherein said CCD signal read-out circuit is provided for each of color signal.

7. A charge-coupled device (CCD) signal read-out circuit for receiving a first signal outputted from a CCD, and substantially removing a reset noise from the first signal by correlated double sampling to produce a second signal that is substantially free from the reset noise, the first signal including a plurality of pixel periods, each pixel period comprising a reset period, a feed-through period, and a pixel signal period, said CCD signal read-out circuit comprising:

first and second signal extractor circuits for receiving the first signal and extracting a feed-through signal and a pixel signal from each respective pixel period;

first and second averaging means for averaging the feed-through signal and the pixel signal extracted by said first and second signal extractor circuits and for phase shifting at least one of;

said averaged feed-through signal and said averaged pixel signal to bring both of the signals in phase; and

a differential amplifier for producing a difference between signals outputted from said first and second averaging means and outputting a resultant signal as the second signal.

8. A CCD signal read-out circuit according to claim 7, wherein said first and second averaging means each comprise:

first and second low-pass filter circuits for low-pass filtering the feed-through signal and the pixel signal extracted by said first and second signal extractor circuits, respectively; and

first and second peak detector circuits for detecting substantial peaks of the feed-through signal and the pixel signal filtered by said first low-pass filter circuit and said second low-pass filter, respectively to produce said averaged feed-through signal and said averaged pixel signal.

9. A CCD signal read-out circuit according to claim 7, wherein said first and second averaging means each comprise:

first and second integrator circuits for integrating the feed-through signal and the pixel signal extracted by said first and second signal extractor circuits, respectively to produce said averaged feed-through signal and said averaged pixel signal.

10. A CCD signal read-out circuit according to claim 7, wherein said CCD is a color image sensor for producing a plurality of color signals, and wherein said CCD signal read-out circuit is provided for each of color signal.

11. A charge-coupled device (CCD) signal read-out circuit for receiving a first signal outputted from a CCD including a plurality of pixel periods, each pixel period comprising a feed-through period and a signal period, and for substantially reducing a correlated noise and a high-frequency noise included in the signal period to produce a second signal that is substantially free from the correlated noise and the high-frequency noise, said CCD signal read-out circuit comprising:

first and second signal extractor circuits for receiving the first signal and for extracting levels of the feed-through period and the signal period for each respective pixel period to develop a feed-through signal and a pixel signal;

a signal inverter circuit for inverting one of the feed-through signal and the pixel signal extracted by said first and second signal extractor circuits, respectively, and for outputting a resultant signal in the form of a serial signal; and

an averaging circuit for averaging the serial signal output from said signal inverter circuit to produce a signal in which the correlated noise and the high-frequency noise have substantially been reduced.

12. A CCD signal read-out circuit according to claim 11, further comprising a signal hold circuit for sampling and holding the signal output from said averaging circuit and outputting a resultant signal as the second signal.

13. A CCD signal read-out circuit according to claim 11, wherein said averaging circuit comprises an integrator circuit for integrating the serial signal over one pixel period.

14. A CCD signal read-out circuit according to claim 12, wherein said averaging circuit comprises an integrator circuit for integrating the serial signal over one pixel period.

15. A CCD signal read-out circuit according to claim 11, wherein said averaging circuit comprises a low-pass filter circuit for low-pass filtering the serial signal.

16. A charge-coupled device (CCD) signal read-out circuit for receiving a first signal outputted from a including a plurality of pixel periods, each pixel period comprising a feed-through period and a signal period, and for substantially reducing a correlated noise and a high-frequency noise included in the signal period to produce a second signal that is substantially free from the correlated noise and the high-frequency noise, said CCD signal read-out circuit comprising:

first and second signal extractor circuits for receiving the first signal and for extracting levels of the feed-through period and the signal period for each respective pixel period to develop a feed-through signal and a pixel signal;

a signal inverter circuit for inverting one of the feed-through signal and the pixel signal extracted by said first and second signal extractor circuits, respectively, and for outputting a resultant signal in the form of a serial signal;

a selector circuit for selecting from said serial signal a part of said serial signal for a first pixel period for developing a first serial signal, and selecting from said serial signal a part of said serial signal for a second pixel period for developing a second serial signal;

a first averaging circuit for averaging the first serial signal to output a signal wherein the correlated noise and the high-frequency noise have substantially been reduced; and

a second averaging circuit for averaging the second serial signal to output a signal wherein the correlated noise and the high-frequency noise have substantially been reduced.

17. A CCD signal read-out circuit according to claim 16, further comprising:

a first sampling circuit for sampling the signal output from said first averaging circuit in time with the first pixel period;

a second sampling circuit for sampling the signal output from said second averaging circuit in time with the second pixel period; and

a signal holding circuit for holding the signals sampled by said first and second sampling circuits and outputting the sampled signals in serial form as the second signal.

18. A CCD signal read-out circuit according to claim 16, wherein the first signal is a color image signal including a plurality of color components, the first pixel period being a pixel period for a first color component, the second pixel period being a pixel period for a second color component.

19. A charge-coupled device (CCD) signal read-out circuit for receiving a first signal outputted from a CCD including a plurality of pixel periods, each pixel period comprising a feed-through period and a signal period, and for substantially reducing a correlated noise and a high-frequency noise included in the signal period to produce a second signal that is substantially free from the correlated noise and the high-frequency noise, said CCD signal read-out circuit comprising:

a first signal extractor circuit for receiving the first signal and extracting levels of the feed-through period and the signal period during a first pixel period to develop a first feed-through signal and a first pixel signal;

a second signal extractor circuit for receiving the first signal and extracting levels of the feed-through period and the signal period during a second pixel period to develop a second feed-through signal and a second pixel signal;

a first signal inverter circuit for inverting one of the first feed-through signal and the first pixel signal and outputting a resultant signal as a first serial signal;

a second signal inverter circuit for inverting one of the second feed-through signal and the second pixel signal and outputting a resultant signal as a second serial signal;

a first averaging circuit for averaging the first serial signal output from said first signal inverter circuit to output a signal wherein the correlated noise and the high-frequency noise have substantially been reduced.

20. A CCD signal read-out circuit according to claim 19, further comprising:

a first sampling circuit for sampling the signal output from said first averaging circuit in time with the first pixel period;

a second sampling circuit for sampling the signal output from said second averaging circuit in time with the second pixel period; and

a signal holding circuit for holding the signals sampled by said first and second sampling circuits and outputting, sampled signals in serial as the second signal.

21. A CCD signal read-out circuit according to claim 19, wherein the first signal is a color image signal including a plurality of color components, the first pixel period being a pixel period for a first color component, the second pixel period being a pixel period for a second color component.