Multi-phase charge sharing method and apparatus

• US 5,574,633 A
• Filed: 02/23/1994
• Issued: 11/12/1996
• Est. Priority Date: 02/23/1994
• Status: Expired due to Term

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: AT&T Global Network Services LLC (AT&T, Inc.), Symbios Logic Incorporated (Broadcom, Inc.), Hyundai Electronics America Incorporated (SK Hynix Inc.)
• Inventors: Prater, James S.
• Primary Examiner(s): Wong, Peter S.
• Assistant Examiner(s): Vu, Bao Q.
• Application Number:
  US08/200,612
• Time in Patent Office: 993 Days
• Field of Search: 307/109, 307/110, 307/412, 307/417, 307/409, 320/1, 363/59, 363/60, 363/61, 326/26, 326/27
• US Class Current: 363/59
• CPC Class Codes: G11C 7/1006 Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
• CPC Class Codes: G11C 7/1048 Data bus control circuits, e.g. precharging, presetting, equalising
• CPC Class Codes: H03K 19/0019 by energy recovery or adiabatic operation

Abstract

A multi-phase charge sharing technique for electrical and electronic circuits. During a first phase, I/O drivers for circuit outputs that are to change value are deactivated. During a second phase, a plurality of circuit outputs are connected together to allow for charge transfer between higher voltage outputs and lower voltage outputs. Since the output nodes generally have capacitive loads, the common connection of high voltage nodes with low voltage nodes results in charge equilibrium, where the voltage on each commonly connected node acquires the same voltage. As existing charge from high voltage nodes is being used to charge lower voltage nodes, the lower voltage nodes are partially charged without requiring additional external power. Following this charge transfer, the outputs are disconnected from one another and operated in their normal fashion. Thus, output values that are changing from a low to a relatively higher voltage are partially boosted to a higher voltage level from existing high voltage sources on other circuit outputs. This reduces the amount of power which is required to drive the output node to a subsequent voltage level. Similarly, output values that are changing from a high to a relatively lower voltage are partially discharged by existing low voltage output nodes. The partial discharging of these nodes results in a reduction in ground bounce.

Claims

1. A system for minimizing power dissipation, comprising:

a plurality of circuits having outputs which from time to time transition between different voltage levels;

means for coupling together at least a portion of the outputs which are about to transition, while maintaining discontinuity between at least a portion of the outputs which are not about to transition.

2. The system of claim 1 wherein said circuits are integrated circuits embodied on a semiconductor substrate.

3. The system of claim 1 where said circuit comprises CMOS field-effect transistors.

4. The system of claim 1 further comprising:

means for decoupling at least one of said coupled outputs; and

means for operating at least one of said plurality of circuits to drive at least one of said decoupled outputs to a subsequent voltage level.

5. The system of claim 4 further comprising a control circuit for sequencing said means for coupling, said means for decoupling and said means for operating.

6. The system of claim 1 wherein a low to high voltage transitioning output is precharged by a high to low voltage transitioning output.

7. A method for minimizing power consumption, comprising the steps of:

transferring charge between a plurality of circuits by connecting a plurality of transitioning circuit outputs together while maintaining discontinuity between non-transitioning circuit outputs;

disconnecting at least one of said plurality of transitioning circuit outputs; and

driving said at least one disconnected output to a subsequent voltage level.

8. The method of claim 7 wherein charge is transferred from a circuit output having a higher voltage to a circuit output having a lower voltage.

9. A method for minimizing power consumption comprising the step of precharging a circuit output by connecting a plurality of transitioning circuit outputs together while maintaining discontinuity between non-transitioning circuit outputs.

10. The method of claim 9 in which at least one circuit output is transitioning from a high voltage to a low voltage, and at least one circuit output is transitioning from a low voltage to a high voltage.

11. The method of claim 10 in which said low to high voltage transitioning output is precharged by said high to low voltage transitioning output.

12. A system for minimizing power consumption, comprising:

means for transferring charge between a plurality of transitioning circuit outputs while maintaining discontinuity between a plurality of non-transitioning circuit outputs; and

means for driving at least one of said transitioning circuit outputs to a subsequent voltage level.

13. A system for minimizing power consumption, comprising:

a first plurality of circuit outputs which transition between differing voltage levels during time T1 (transitioning outputs);

a second plurality of circuit outputs which do not transition between differing voltage levels during time T1 (non-transitioning outputs);

means for precharging at least one of said first circuit outputs by connecting a plurality of said transitioning circuit outputs together while maintaining discontinuity between said non-transitioning outputs.

14. The system of claim 13 in which a low to high voltage transitioning output is precharged by a high to low voltage transitioning output.

15. A method for minimizing power consumption in a system having a plurality of circuits and circuit outputs, comprising the steps of:

maintaining a first state of at least a portion of said circuit outputs;

comparing said first state with a second state of said portion of circuit outputs to determine transitioning outputs;

coupling at least a portion of said transitioning outputs together;

decoupling at least a portion of said coupled outputs; and

operating at least one of said circuits to drive at least one of said decoupled outputs to said second state.

16. A method for minimizing power dissipation, comprising the steps of:

coupling a first output of a first pad driver circuit to a second output of a second pad driver circuit during a first time period;

decoupling said first and second outputs during a second time period; and

operating at least one of said first and second pad driver circuits to drive at least one of said first and second outputs to a subsequent voltage level during a third time period.

17. A system for minimizing power consumption in a system having a plurality of circuits and circuit outputs, comprising:

a memory for maintaining a first state of at least a portion of said circuit outputs;

means for comparing said first state with a second state of said portion of circuit outputs to determine transitioning outputs; and

switching means for coupling and decoupling said transitioning outputs.

18. The system of claim 17 further comprising means for operating at least one of said circuits to drive at least one of said transitioning outputs to said second state.

19. A method for operating a circuit having a plurality of outputs, where the outputs transition between different voltage levels, comprising the steps of:

determining which of the plurality of outputs are about to transition; and

selectively coupling together at least some of the about to transition outputs.

20. In combination:

an integrated circuit having a plurality of outputs; and

means for selectively coupling at least some of the plurality of outputs based upon whether the outputs are about to transition.