Method and apparatus for retaining flash block structure data during erase operations in a flash EEPROM memory array

• US 5,581,723 A
• Filed: 02/19/1993
• Issued: 12/03/1996
• Est. Priority Date: 02/19/1993
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Wells, Steven E., Hasbun, Robert N.
• Primary Examiner(s): RUDOLPH, REBECCA
• Application Number:
  US08/020,204
• Time in Patent Office: 1,383 Days
• Field of Search: 395/425, 395/575, 395/500, 395/430, 395/479, 395/492, 395/493, 395/481, 365/185, 365/238.5, 371/10.1, 371/11.1, 371/21.6, 364/DIG. 1, 364/DIG. 2
• US Class Current: 711/103
• CPC Class Codes: G06F 11/1435 using file system or storage system metadata
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0664 at device level, e.g. emulation of a storage device or system

Abstract

A method for reliably storing management data in a flash EEPROM memory array, which array is divided into a plurality of individually-erasable blocks of memory cells and in which each of the blocks of memory cells has stored thereon data regarding management of the array during a cleanup process in which valid data stored in a first block is written to another block of the array, and then the first block is erased. The process includes the steps of storing data regarding management of the array from the first block in random access memory and, in an enhanced process, on another block before erasure of the first block. The data may then be rewritten to the first block after the erase. With the enhanced process, a special identification is provided to the data regarding the management of the array stored on another block which is outside the normal identification range for the host computer so that the specially identified data is not lost during a power loss during an erase process and may be detected after power is restored to the system.

Claims

1. A method for reliably storing management data in the event of a power loss in a memory array including a plurality of devices which are capable of retaining data when power is removed, wherein the array is divided into a plurality of individually-erasable blocks of memory cells and each of the blocks of memory cells has stored thereon data regarding management of the array, the method, during a process in which valid data stored in a first block is written to another block of the array, and then the first block is erased, comprising the steps of:

storing management data regarding management of the array from the first block onto a second block before erasure of the first block;

providing a detectable identification to the management data on the second block;

storing the detectable identification onto the second block;

seeking the detectable identification when power is applied to a system after the power loss;

reading the management data from the second block;

erasing the first block; and

writing the management data to the first block.

2. A method for reliably storing management data in a memory array as claimed in claim 1 in which the memory array is a flash EEPROM memory array.

3. A method for reliably storing management data in a memory array as claimed in claim 1 in which the management data includes data for identifying the first block.

4. A method for reliably storing management data in a memory array as claimed in claim 1 in which the detectable identification is an identification which is outside a normal range for data stored in the memory array.

5. A process for use with a memory array having a plurality of blocks of EEPROM memory cells, wherein each of the plurality of blocks stores data provided by a host as well as data relating to management of the array, the process for preserving the data relating to management of the array in the event of a power loss during erasure of a first block of the plurality of blocks comprising the steps of:

writing valid data provided by the host from the first block to a second block of the memory array;

reading the data relating to management of the array from the first block;

writing the data relating to management of the array to a third block of the memory array;

writing an identification outside a range accessible by the host to the third block;

reading the data relating to management of the array from the third block after erasing the first block; and

writing the data relating to management of the array to the first block.

6. A process as claimed in claim 5 further comprising the steps of:

seeking data having the identification on application of power to the host;

identifying the first block if the identification is found;

erasing the first block; and

writing the data relating to management of the array to the first block after erasure is complete.

7. A process as claimed in claim 6 in which the memory array is a flash EEPROM memory array.

8. A method for reliably identifying an incomplete erasure of blocks of an EEPROM memory array in a memory array having a plurality of blocks of EEPROM memory cells due to a power loss, wherein each of the plurality of blocks stores data provided by a host as well as data relating to management of the array, and wherein invalid data is removed from the memory cells of the array by a process of writing valid data provided by the host from the first block to another block of the memory array, and then the first block is erased, the method comprising the steps of:

writing the data relating to management of the array from the first block to a second block of the memory array after all of the valid data provided by the host has been written to a third block of the memory array;

writing a special identification outside a range accessible by the host to the second block;

seeking data having the special identification stored with the data relating to management of the array on application of power to the host after the power loss;

identifying the first block if the special identification is found;

erasing the first block; and

writing the data relating to management of the array to the first block after erasure is complete.

9. A method as claimed in claim 8 in which the memory array is a flash EEPROM memory array, and in which the data relating to management of the array includes an identification of the first block.

10. A method for preserving management data in a memory array in the event of a power loss, wherein the memory array includes a plurality of memory cells which are capable of retaining data when power is removed, wherein the array is divided into a plurality of individually-erasable blocks of memory cells and each of the blocks of memory cells has stored thereon data regarding management of the array, the method, during a process in which valid data stored in a first block is written to another block of the array, and then the first block is erased, comprising the steps of:

storing management data regarding management of the array from the first block onto a second block of the array before erasure of the first block;

providing a detectable identification to the management data;

updating the management data before rewriting that data to the first block; and

rewriting the management data to the first block after the erasure of the first block.

11. A method for preserving management data in a memory array as claimed in claim 10 further comprising the steps of seeking the detectable identification when power is applied to a system after a power loss, reading the management data from the second block, erasing the first block, and writing the management data to the first block.

12. A method for preserving management data in a memory array as claimed in claim 10 in which the memory array is a flash EEPROM memory array.

13. A method for preserving management data in a memory array as claimed in claim 10, wherein the management data includes data for identifying the first block.

14. A method for preserving management data in a memory array as claimed in claim 10, wherein the detectable identification is outside a normal range for data stored in the memory array.

15. A process for use with a memory array having a plurality of blocks of EEPROM memory cells, wherein each of the plurality of blocks stores data provided by a host as well as data relating to management of the array, the process for preserving the data relating to management of the array in the event of a power loss during erasure of a first block of the plurality of blocks comprising the steps of:

writing valid data provided by the host from the first block to a second block of the memory array;

writing the data relating to management of the array from the first block to random access memory;

writing the data relating to management of the array from the first block to a third block of the memory array;

writing an identification outside a range accessible by the host with the data relating to management of the array;

updating the data relating to management of the array stored in random access memory; and

rewriting the data relating to management of the array stored in random access memory to the first block after the erasure of the first block.

16. A process as claimed in claim 15 further comprising the steps of:

seeking data having the identification outside the range accessible by the host stored with the data relating to management of the array on application of power to the host;

identifying the first block if the identification is found;

erasing the first block; and

writing the data relating to management of the array to the first block after erasure is complete.