Method and apparatus for the protection of write data in a disk array

• US 5,596,708 A
• Filed: 01/25/1996
• Issued: 01/21/1997
• Est. Priority Date: 04/04/1994
• Status: Expired due to Term

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: AT&T Global Network Services LLC (AT&T, Inc.), Symbios Logic Incorporated (Broadcom, Inc.), Hyundai Electronics America Incorporated (SK Hynix Inc.)
• Inventors: Weber, Bret S.
• Primary Examiner(s): Canney, Vincent P.
• Application Number:
  US08/591,366
• Time in Patent Office: 362 Days
• Field of Search: 395/182.04, 395/182.05, 395/183.18
• US Class Current: 714/6.12
• CPC Class Codes: G06F 11/1076 Parity data used in redundant arrays of independent storages, e.g. in RAID systems
• CPC Class Codes: G06F 11/1435 using file system or storage system metadata
• CPC Class Codes: G06F 2211/1059 Parity-single bit-RAID5, i.e. RAID 5 implementations
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0673 Single storage device

Abstract

A transfer memory backup system for a RAID level 5 disk array storage system which includes a transfer buffer, wherein write data received by the array is written into a transfer buffer, and a write complete status signal generated, prior to the write data being written to the disk drives within the array. The transfer memory backup system includes a low power, industry standard PCMCIA (Personal Computer Memory Card International Association) device along with a small, temporary voltage source made up of a small rechargeable battery or a high capacitance gold capacitor. Upon the detection of a disk array storage system failure, low power logic provides continuous refresh for the transfer buffer as well as power to the components included in the transfer memory backup system upon a disk array storage system failure. A low power CMOS microprocessor with self contained microcode (mask programmable ROM) controls the transfer of data from the transfer buffer to removable storage medium within the PCMCIA device.

Claims

1. In a data storage system wherein write data received from a host is written into a transfer buffer and a write complete status signal is provided by the data storage system to the host prior to said write data being written to a permanent storage device within said data storage system, a method for preventing the loss of data residing in said transfer buffer comprising the steps of:

transferring the data residing in said transfer buffer to a low power non-volatile storage device upon an occurrence of a data storage system failure and, in the absence of said data storage system failure, not transferring the data residing in said transfer buffer to said low power non-volatile storage device and in which said low power non-volatile storage device receives the data from said transfer buffer after the data has been received by said transfer buffer upon occurrence of said data storage system failure and the data transferred to said low power non-volatile storage device being the same data that is to be transferred to said permanent storage device, wherein said low power non-volatile storage device is different from said permanent storage device and in which less power is utilized in transferring data residing in said transfer buffer to said low power non-volatile storage device than power utilized in transferring data residing in said transfer buffer to said permanent storage device.

2. The method in accordance with claim 1, wherein the permanent storage device is selected from a group including RAID levels 2, 3, 4, and 5 disk array systems.

3. The method in accordance with claim 1, wherein said low power non-volatile storage comprises a PCMCIA device.

4. In a data storage system wherein write data received from a host is written into a transfer buffer and a write complete status signal is provided by the data storage system to the host prior to said write data being written to a permanent storage device within said data storage system, a method for preventing the loss of data residing in said transfer buffer comprising the steps of:

monitoring the operation of said data storage system to detect an occurrence of a data storage system failure;

providing a low power non-volatile storage device;

providing a low power backup transfer circuitry for transferring the data residing in said transfer buffer to said low power non-volatile storage device, wherein said low power backup transfer circuitry is different from write circuitry within said data storage system that is used to transfer the data residing in said transfer buffer to said permanent storage device and in which said low power backup transfer circuitry utilizes less power than said write circuitry to transfer the data residing in said transfer buffer;

providing a small voltage source for temporarily supplying power to said transfer buffer, said low power backup transfer circuitry, and said low power non-volatile storage device upon the occurrence of a data storage system failure; and

using said low power backup transfer circuitry to transfer the data residing in said transfer buffer to said low power non-volatile storage device upon the occurrence of a data storage system failure.

5. The method in accordance with claim 4, wherein the permanent storage device is selected from a group including RAID levels 2, 3, 4, and 5 disk array systems.

6. The method in accordance with claim 4, wherein said low power non-volatile storage comprises a PCMCIA device.

7. The method in accordance with claim 4, wherein said small voltage source comprises a gold capacitor for supplying power.

8. The method in accordance with claim 7, wherein said gold capacitor has a high capacitance value, such as three farads.

9. The method in accordance with claim 4, wherein said small voltage source comprises a small, rechargeable battery for supplying power.

10. A memory backup system for a data storage system, the data storage system including a transfer buffer, write circuitry, and a permanent storage device and receiving power from a main power source, wherein write data received from a host is written into the transfer buffer and a write complete status signal is provided by the data storage system to the host prior to the write circuitry writing said write data to the permanent storage device, said memory backup system comprising:

a low power non-volatile storage device connected to transfer data with the transfer buffer;

a small voltage source for temporarily supplying power; and

low power backup transfer circuitry responsive to the receipt of a signal from the data storage system indicating the occurrence of a data storage system failure for controlling the operation of said small voltage source to provide power to said low power non-volatile storage device, the transfer buffer, and said low power backup transfer circuitry, for controlling said low power non-volatile storage device and the transfer buffer to transfer data residing in the transfer buffer to said low power non-volatile storage device, and for substantially electrically isolating said small voltage source from the main power source, the permanent storage device, and the write circuitry so as to reduce the power provided by said small voltage source during the transfer of data residing in the transfer buffer to said low power non-volatile storage device, wherein said low power backup transfer circuitry is different from the write circuitry and utilizes less power than the write circuitry to transfer data residing in the transfer buffer.

11. The memory backup system in accordance with claim 10, wherein the permanent storage device is selected from a group including RAID levels 2, 3, 4, and 5 disk array systems.

12. The memory backup system in accordance with claim 10, wherein said low power non-volatile storage comprises a PCMCIA device.

13. The memory backup system in accordance with claim 12, wherein said PCMCIA device comprises a PCMCIA type 1 flash memory card device.

14. The memory backup system in accordance with claim 12, wherein said PCMCIA device comprises a PCMCIA type 3 small form factor disk drive.

15. The memory back up system in accordance with claim 10, wherein said small voltage source comprises a gold capacitor for supplying power.

16. The memory backup system in accordance with claim 15, wherein said gold capacitor has a high capacitance value, such as three farads.

17. The memory backup system in accordance with claim 10, wherein said small voltage source comprises a small, rechargeable battery for supplying power.

29. The memory backup system in accordance with claim 10, wherein:

said low power backup transfer circuitry comprises a state machine logic device for performing memory transfers from the transfer buffer to said low power non-volatile storage device.

30. The memory backup system in accordance with claim 10, wherein:

said low power backup transfer circuitry comprises refresh means for providing a refresh signal to the transfer buffer that is different from a refresh signal provided by the data storage system to the transfer buffer, said refresh means thereby maintaining the integrity of data residing in the transfer buffer until the data transfer to said low power non-volatile storage device is completed.

31. The memory backup system in accordance with claim 10, wherein said low power backup transfer circuitry includes:

a backup data bus for transferring data between the transfer buffer and said low power non-volatile storage, wherein said backup data bus is different from a main data bus within the data storage system that is used to transfer data between the transfer buffer and the permanent storage device; and

means for electrically isolating said backup data bus from the main data bus in response to the receipt of said signal indicating the occurrence of a data storage system failure so as to reduce the power provided by said small voltage source during the transfer of data from the transfer buffer to said low power non-volatile storage device.

18. A data storage system for storing data received from a host system, said data storage system comprising:

a first non-volatile storage device for the storage of data received from the host system;

a transfer buffer connected between the host system and said first non-volatile storage device, wherein data received from the host system is written into said transfer buffer and a right complete status signal is provided by said data storage system to the host prior to said data being written to said first non-volatile storage device; and

a memory backup system including a second non-volatile storage device that is different from said first non-volatile storage device and in which said second non-volatile storage device utilizes less power to write data residing in said transfer buffer than the power utilized by said first non-volatile storage device when writing data residing in said transfer buffer, and transfer means, connected with said transfer buffer, for transferring data residing in said transfer buffer to said second non-volatile storage device in response to an occurrence of a data storage system failure, said transfer means comprising a low power microprocessor for operating in a first power mode when transferring data from said transfer buffer to said first non-volatile storage device and a second power mode when transferring data from said transfer buffer to said second non-volatile storage device, wherein said low power microprocessor utilizes less power when operating in said second power mode than when operating in said first power mode.

19. The data storage system in accordance with claim 18, wherein:

said transfer buffer is a DRAM memory device requiring a refresh signal so as to retain data residing in said DRAM memory device; and

said memory backup system includes means responsive to said data storage system failure for providing a refresh signal to said DRAM memory device that is different from a refresh signal provided by said data storage system to said DRAM memory device.

20. The data storage system in accordance with claim 18, wherein:

said transfer buffer is an SRAM memory device.

21. The data storage system in accordance with claim 18, wherein said memory backup system further includes:

a small voltage source connected to temporarily provide power to said transfer buffer and said second non-volatile storage device; and

logic responsive to a data storage system failure for controlling the operation of said voltage source to provide power to said non-volatile storage device and said transfer buffer.

22. The memory backup system in accordance with claim 18, wherein said first non-volatile storage device is selected from a group including RAID levels 2, 3, 4, and 5 disk array systems.

23. The memory backup system in accordance with claim 18, wherein said second non-volatile storage device comprises a PCMCIA device.

24. The memory backup system in accordance with claim 23, wherein said PCMCIA device comprises a PCMCIA type 1 flash memory card device.

25. The memory backup system in accordance with claim 23, wherein said PCMCIA device comprises a PCMCIA type 3 small form factor disk drive.

26. The memory backup system in accordance with claim 21, wherein said small voltage source comprises a gold capacitor for supplying power.

27. The memory backup system in accordance with claim 26, wherein said gold capacitor has a high capacitance value, such as three farads.

28. The method in accordance with claim 21, wherein said small voltage source comprises a small rechargeable battery for supplying power.