Microcomputer having reduced power consumption through impedance control and frequency reduction

• US 5,632,040 A
• Filed: 11/30/1995
• Issued: 05/20/1997
• Est. Priority Date: 07/24/1995
• Status: Expired due to Fees

• Current Assignee: Mitsubishi Electric Corporation, Mitsubishi Electric Semiconductor Software Company Limited
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation), Mitsubishi Electric Semiconductor Software Company Limited
• Inventors: Nakajima, Toyokatsu
• Primary Examiner(s): Ray, Gopal C.
• Application Number:
  US08/564,940
• Time in Patent Office: 537 Days
• Field of Search: 395/750, 395/775, 395/550, 364/707, 364/492, 365/227, 327/542, 307/66, 307/48, 307/34
• US Class Current: 713/322
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A microcomputer comprising a clock circuit which selects a pulse signal as a system clock of the microcomputer from among a plurality of pulse signals and a power source impedance controlling circuit which controls an impedance between a power input terminal and the units of the microcomputer based on the frequency of the pulse signal selected by the clock circuit to provide the electric power to the units of the microcomputer. The power source impedance controlling circuit controls the impedance such that the power source impedance is made lower as the frequency of the selected pulse signal is higher.

Claims

1. A microcomputer having a plurality of units including a central processing unit operating according to a system clock, the microcomputer comprising:

a power input terminal for inputting electric power from outside of the microcomputer and for providing the electric power to the microcomputer;

pulse signal generating means for generating a plurality of pulse signals, each pulse signal having a different frequency;

means for generating a selection signal;

pulse signal selecting means for selecting a pulse signal from among the plurality of the pulse signals responsive to the selection signal inputted to the pulse signal selecting means and for outputting the selected pulse signal as the system clock; and

power source impedance controlling means for controlling an impedance between the power input terminal and the plurality of units of the microcomputer based on a frequency of the selected pulse signal and for providing the inputted electric power to the plurality of units of the microcomputer.

2. A microcomputer according to claim 1, wherein the power source impedance controlling means lowers a value of an impedance between the power input terminal and the plurality of units of the microcomputer when a frequency of the selected pulse signal rises.

3. A microcomputer according to claim 2, wherein the pulse signal selecting means includes:

a clock register for storing information as to selection of one pulse signal from among the plurality of the pulse signals under a write operation of the central processing unit; and

a clock selector for selecting one pulse signal from among the plurality of the pulse signals based on the information stored in said clock register,

wherein the power source impedance controlling means controls the impedance based on the information stored in said clock register.

4. A microcomputer according to claim 3, further comprising:

an impedance register for storing information as to impedance control by the power source impedance controlling means under a write operation of the microcomputer; and

signal outputting means for outputting a signal indicative of making the impedance lower when the information stored in the impedance register indicates that the impedance should be made lower even when the information stored in the clock register indicates that the impedance should be made higher,

wherein the power source impedance controlling means controls the impedance based on the signal outputted from the signal outputting means.

5. A microcomputer according to claim 3, further comprising:

an impedance register for storing information as to impedance control by the power source impedance controlling means under a write operation of the microcomputer;

a mode register for storing information under a write operation of the central processing unit as to selection of one mode between a system clock associated mode in which the impedance is controlled based on the information stored in the clock register and an independent mode in which the impedance is controlled based on the information stored in the impedance register independently of the information stored in the clock register; and

signal outputting means for outputting a signal from the clock register when the information indicative of the system clock associated mode is stored in the mode register and for outputting a signal from the impedance register when the information indicative of the independent mode is stored in the mode register,

wherein the power source impedance controlling means controls the impedance based on a signal outputted from the signal outputting means.

6. A microcomputer according to claim 5, wherein the clock register includes means for storing information indicative of one preselected pulse signal from among the plurality of the pulse signals in the clock register when the microcomputer is reset.

7. A microcomputer according to claim 6, wherein said power source impedance controlling means includes:

a resistor connected serially to said power input terminal; and

a power source selector for selecting a circuit line between a circuit line connected to said power input terminal via the resistor and a circuit line connected directly to the power input terminal.

8. A microcomputer according to claim 6, wherein said power source impedance controlling means includes:

a plurality of transistors having on-resistance values different from each other, each of the transistors being serially connected to said power input terminal; and

a power source selector for selecting a circuit line from among circuit lines via the plurality of transistors respectively by turning on a corresponding transistor.

9. A microcomputer according to claim 8, wherein plurality of the units of the microcomputer includes an analog circuit.

10. A microcomputer according to claim 3, wherein the clock register includes means for storing information indicative of one preselected pulse signal from among the plurality of the pulse signals in the clock register when the microcomputer is reset.

11. A microcomputer according to claim 1, wherein the pulse signal selecting means includes:

a clock register for storing information as to selection of one pulse signal from among the plurality of the pulse signals under a write operation of the central processing unit; and

a clock selector for selecting one pulse signal from among the plurality of the pulse signals based on the information stored in said clock register,

wherein the power source impedance controlling means controls the impedance based on the information stored in said clock register.

12. A microcomputer according to claim 11, further comprising:

an impedance register for storing information as to impedance control by the power source impedance controlling means under a write operation of the microcomputer; and

a signal outputting means for outputting a signal indicative of making the impedance lower when the information stored in the impedance register indicates that the impedance should be made lower even when the information stored in the clock register indicates that the impedance should be made higher,

wherein the power source impedance controlling means controls the impedance based on the signal outputted from the signal outputting means.

13. A microcomputer according to claim 11, further comprising:

an impedance register for storing information as to impedance control by the power source impedance controlling means under a write operation of the microcomputer;

a mode register for storing information under a write operation of the central processing unit as to selection of one mode between a system clock associated mode in which the impedance is controlled based on the information stored in the clock register and an independent mode in which the impedance is controlled based on the information stored in the impedance register independently of the information stored in the clock register; and

signal outputting means for outputting a signal from the clock register when the information indicative of the system clock associated mode is stored in the mode register and for outputting a signal from the impedance register when the information indicative of the independent mode is stored in the mode register,

wherein the power source impedance controlling means controls the impedance based on a signal outputted from the signal outputting means.

14. A microcomputer according to claim 1, wherein said power source impedance controlling means includes:

a resistor connected serially to said power input terminal; and

a power source selector for selecting a circuit line between a circuit line connected to said power input terminal via the resistor and a circuit line connected directly to the power input terminal.

15. A microcomputer according to claim 1, wherein said power source impedance controlling means includes:

a plurality of transistors having on-resistance values different from each other, each of the transistors being serially connected to said power input terminal; and

a power source selector for selecting a circuit line from among circuit lines via the plurality of transistors respectively by turning on a corresponding transistor.

16. A microcomputer having a plurality of units including a central processing unit operating according to a system clock, the microcomputer comprising:

a power input terminal for inputting electric power from outside of the microcomputer and for providing the electric power to the microcomputer;

pulse signal generating means for generating a plurality of pulse signals, each pulse signal having a different frequency;

means for generating a selection signal;

pulse signal selecting means for selecting a pulse signal from among the plurality of the pulse signals responsive to the selection signal inputted to the pulse signal selecting means and for outputting the selected pulse signal as the system clock;

power source impedance controlling means for controlling an impedance between the power input terminal and a first part of the plurality of units of the microcomputer based on a frequency of the selected pulse signal for providing the inputted electric power to the first part of the plurality of units of the microcomputer; and

electric power providing means for providing a second part of the plurality of units of the microcomputer with the electric power inputted to the power input terminal.

17. A microcomputer according to claim 16, wherein the power source impedance controlling means lowers a value of an impedance between the power input terminal and the first part of the plurality of units of the microcomputer when a frequency of the selected pulse signal rises.

18. A microcomputer according to claim 16, wherein the plurality of second part of the units of the microcomputer includes an analog circuit.