Transition analysis and circuit resynthesis method and device for digital circuit modeling
DC CAFCFirst Claim
1. A method of configuring a configurable logic system to operate in an environment, the logic system generating output signals to the environment in response to at least one environmental timing signal and environmental data signals provided from the environment, the method comprising:
- defining an internal clock signal;
configuring the logic system to perform logic operations for generating the output signals in response to the environmental data signals and the internal clock signal; and
configuring the logic system to have a controller for coordinating operation of the logic operations in response to the internal clock signal and the environmental timing signal.
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Abstract
A method of configuring a configurable logic system, including a single or multi-FPGA network, is disclosed in which an internal clock signal is defined that has a higher frequency than timing signals the system receives from the environment in which it is operating. The frequency can be at least ten times higher than a frequency of the environmental timing signals. The logic system is configured to have a controller that coordinates operation of its logic operation in response to the internal clock signal and environmental timing signals. Specifically, the controller is a finite state machine that provides control signals to sequential logic elements such as flip-flops. The logic elements are clocked by the internal clock signal. In the past, emulation or simulation devices, for example, operated in response to timing signals from the environment. A new internal clock signal, invisible to the environment, rather than the timing signals is used to control the internal operations of the devices. Additionally, a specific set of transformations are disclosed that enable the conversion of a digital circuit design with an arbitrary clocking methodology into a single clock synchronous circuit.
192 Citations
50 Claims
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1. A method of configuring a configurable logic system to operate in an environment, the logic system generating output signals to the environment in response to at least one environmental timing signal and environmental data signals provided from the environment, the method comprising:
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defining an internal clock signal; configuring the logic system to perform logic operations for generating the output signals in response to the environmental data signals and the internal clock signal; and configuring the logic system to have a controller for coordinating operation of the logic operations in response to the internal clock signal and the environmental timing signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method for converting a digital circuit design into a new circuit that is substantially functionally equivalent to the digital circuit design, the digital circuit design and the new circuit being adapted to operate in an environment in response to at least one environmental timing signal and environmental data signals and providing output data signals to the environment, the method comprising:
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defining an internal clock signal; and resynthesizing sequential logic elements in the digital circuit design that are clocked by the environmental timing signal to sequential logic elements in the new circuit that are clocked by the internal clock signal. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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27. A logic system for generating output signals to an environment in response to at least one environmental timing signal and environmental data signals provided from the environment, the logic system comprising:
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an internal clock for generating an internal clock signal for the logic system; logic means for generating the output signals in response to the environmental data signals; and controller means for coordinating operation of the logic means in response to the internal clock signal and the environmental timing signal.
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28. A logic system for generating output signals to an environment in response to at least one environmental timing signal and environmental data signals provided from the environment, the logic system comprising:
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an internal clock for generating an internal clock signal for the logic system; at least one configurable logic device including; logic which generates the output signals in response to the environmental data signals and the internal clock signal; and a controller which coordinates operation of the logic in response to the internal clock signal and the environmental timing signal. - View Dependent Claims (29, 30, 31, 32, 33, 34, 35, 36)
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37. A configurable logic system, comprising:
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at least one configurable logic device; an interconnect providing connections between the logic device and an environment to convey output data signals from the configurable logic device and at least one environmental timing signal and environmental data signals from the environment; and a configurer for programming the configurable logic device to synchronize the environmental timing signal to an internal clock signal of the logic system. - View Dependent Claims (38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50)
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Specification