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Repeater for a digital communication system which eliminates cumulative jitter

  • US 5,680,415 A
  • Filed: 05/31/1996
  • Issued: 10/21/1997
  • Est. Priority Date: 05/31/1996
  • Status: Expired due to Fees
First Claim
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1. An electronic repeater which is comprised of:

  • an input terminal on which a continuous input series of bits are received, at a repeater input bit rate, which constitute an interleaved sequence of input headers and data blocks;

    an output terminal on which a continuous output series of bits are transmitted, at a repeater output bit rate not equal to and independent of said repeater input bit rate, which constitute an interleaved sequence of output headers and said data blocks; and

    ,a digital logic circuit followed by a single input single-single memory which are coupled in series between said input terminal and said output terminal, where said digital logic circuit passes said data blocks and generates said output headers unconditionally by exclusively adding bits to/exclusively subtracting bits from said input headers, such that a count of any bits added minus any bits subtracted plus the number of bits received minus the number of bits transmitted stays within a predetermined range, and where said memory temporarily stores only the passed data blocks and output headers from said digital logic circuit for transmission without modification on said output terminal.

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