Multiple-bank memory architecture and systems and methods using the same

  • US 5,687,132 A
  • Filed: 10/26/1995
  • Issued: 11/11/1997
  • Est. Priority Date: 10/26/1995
  • Status: Expired due to Term
First Claim
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1. A memory comprising:

  • a first plurality of columns of memory cells each including at least one conductive bitline;

    a second plurality of columns of memory cells each including at least one conductive bitline; and

    a plurality of gates organized in independently controlled groups for selectively coupling said bitlines of a selected group of said first plurality of columns with a group of said bitlines of said second plurality of columns for transferring a at least one bit of data from a selected cell of said first plurality of columns of cells to a selected cell of said second plurality of columns of cells.

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