Statistically based current generator circuit

• US 5,701,097 A
• Filed: 08/15/1995
• Issued: 12/23/1997
• Est. Priority Date: 08/15/1995
• Status: Expired due to Term

• Current Assignee: Intersil Americas LLC (Renesas Electronics Corporation)
• Original Assignee: Harris Corporation (L3Harris Technologies, Inc.)
• Inventors: Chi, Chong I., Fisher, Gregory J.
• Primary Examiner(s): Callahan, Timothy P.
• Assistant Examiner(s): ADOLPHE, EUNJA
• Application Number:
  US08/515,435
• Time in Patent Office: 861 Days
• Field of Search: 327/530, 327/38, 327/103, 327/362
• US Class Current: 327/538
• CPC Class Codes: G05F 3/267 using both bipolar and field-effect technology

Abstract

The invention is a circuit and method for selecting a plurality of different types of resisters and for reliably manufacturing a current generator across different wafer lots. In one embodiment, a monolithic current generator applies the output voltage of a voltage reference circuit across a plurality of series-connected resisters of different types. The resisters are preferably statistically independent resisters, which permits a total resistance with a predefined standard resistance deviation across manufacturing wafer lots. An output current may then be produced which has a predefined standard current deviation across manufacturing wafer lots. In a preferred embodiment, no more than six different types of resisters are used. The resisters may be chosen from the group consisting of diffused resisters, implanted resisters, thin film resisters, metal resisters, and composite resisters. The present invention also includes a method for reliably producing current generators across wafer lots. A plurality of voltage reference circuits are formed in electrical connection with a plurality of n different types of series-connected resisters in a plurality of semiconductor die. Preferably, the plurality of n statistically independent resisters are formed with each resistor of the plurality of statistically independent resisters having a predefined standard resistance deviation across manufacturing wafer lots. An output voltage from respective ones of the voltage reference circuits applied across respective ones of the plurality of n different types of resisters would produce a plurality of respective output currents. Each of the respective output currents preferably has a predefined standard current deviation across manufacturing wafer lots.

Claims

1. A monolithic current generator comprising:

a voltage reference circuit having an output voltage; and

a resistor ladder electrically connected to said voltage reference circuit such that the output voltage is applied across said resistor ladder for compensating for process variations thereby producing an output current, said resistor ladder having a plurality of n statistically independent resistors electrically connected in series, said plurality of n statistically independent resistors having respective as-manufactured resistance values varied from respective target resistance mean values so that the as-manufactured resistance value for one resistor is generally independent of the as-manufactured resistance value for each other resistor, each of the n statistically independent resistors being selected according to;

##EQU18## where r_T =total target resistance mean value of the resistor ladder;

σ

_T =standard deviation of the total as-manufactured resistance value of the resistor ladder;

x_i =a number greater than one which represents the target resistance mean value of each statistically independent resistor, ri, as some fraction of the total target resistance mean value;

σ

_i =standard deviation of the as-manufactured resistance value of the ith statistically independent resistor, r_i, in the resistor ladder; and

where the target mean resistance value of each statistically independent resistor, r_i,=r_T /x_i.

2. A current generator according to claim 1 wherein all of the variables x_i to x_n are equal to a same number greater than one.

25. A monolithic current generator according to claim 1 wherein said plurality of statistically independent resistors comprises a plurality of different types of resistors being selected from the group consisting of diffused resistors, implanted resistors, thin film resistors, metal resistors, and composite resistors.

3. A monolithic current generator comprising:

a voltage reference circuit having an output voltage; and

a resistor ladder having a plurality of statistically independent resistors electrically connected in series, said plurality of statistically independent resistors for compensating for process variations having respective as-manufactured resistance values varied from respective target resistance mean values so that the as-manufactured resistance value for one resistor is generally independent of the as-manufactured resistance value for each other resistor, said plurality of statistically independent resistors having a total as-manufactured resistance value with a predefined standard deviation, said resistor ladder being electrically connected to said voltage reference circuit such that the output voltage is applied across said resistor ladder thereby producing an as-manufactured output current having a predefined standard deviation being dependent on the predefined standard deviation of the total as-manufactured resistance value.

4. A current generator according to claim 3 wherein said plurality of statistically independent resistors comprises no more than six statistically independent resistors.

5. A current generator according to claim 3 wherein said plurality of statistically independent resistors are selected from the group consisting of diffused resistors, implanted resistors, thin film resistors, metal resistors, and composite resistors.

6. An integrated circuit comprising:

an internal circuit having a signal input, a signal output, and a bias current input, the signal output being responsive to an input signal at the signal input and a bias current at the bias current input;

a voltage reference circuit having an output voltage; and

a resistor ladder having a plurality of statistically independent resistors electrically connected in series for compensating for process variations, said plurality of statistically independent resistors having respective as-manufactured resistance values varied from respective target resistance mean values so that the as-manufactured resistance value for one resistor is generally independent of the as-manufactured resistance value for each other resistor, said plurality of statistically independent resistors having a total as-manufactured resistance value with a predefined standard deviation, said resistor ladder being electrically connected to said voltage reference circuit and said internal circuit such that the output voltage is applied across said resistor ladder which thereby produces the bias current, the bias current being electrically provided to the bias current input, and wherein the as-manufactured bias current has a predefined standard deviation which is dependent on the predefined standard deviation of the total as-manufactured resistance value.

7. An integrated circuit according to claim 6 wherein said plurality of statistically independent resistors comprises no more than six statistically independent resistors.

8. An integrated circuit according to claim 6 wherein said plurality of statistically independent resistors are selected from the group consisting of diffused resistors, implanted resistors, thin film resistors, metal resistors, and composite resistors.

9. An integrated circuit comprising:

an internal circuit having a signal input, a signal output, and a bias current input, the signal output being affected by an input signal at the signal input and a bias current at the bias current input;

a voltage reference circuit having an output voltage; and

a resistor ladder having a plurality of different types of resistors electrically connected in series for compensating for process variations, said plurality of different types of resistors being selected from the group consisting of diffused resistors, implanted resistors, thin film resistors, metal resistors, and composite resistors, said resistor ladder being electrically connected to said voltage reference circuit and said internal circuit such that the output voltage is applied across said resistor ladder which thereby produces the bias current, the bias current being electrically provided to the bias current input.

10. A current generator according to claim 9 wherein said plurality of different types of resistors comprise a plurality of statistically independent resistors, said plurality of statistically independent resistors having respective as-manufactured resistance values varied from respective target resistance mean values so that the as-manufactured resistance value for one resistor is generally independent of the as-manufactured resistance value for each other resistor, each of said plurality of statistically independent resistors having an as-manufactured resistance value with a predefined standard deviation.

11. An integrated circuit according to claim 9 wherein said plurality of different types of resistors comprises no more than six different types of resistors.

12. A monolithic current generator comprising:

a voltage reference circuit having an output voltage; and

a plurality of different types of resistors electrically connected in series for compensating for process variations, said plurality of different types of resistors being selected from the group consisting of diffused resistors, implanted resistors, thin film resistors, metal resistors, and composite resistors, said plurality of different types of resistors being electrically connected to said voltage reference circuit such that the output voltage is applied across said plurality of different types of resistors and thereby produces an output current.

13. A current generator according to claim 12 wherein said plurality of different types of resistors comprise a plurality of statistically independent resistors having respective as-manufactured resistance values varied from respective target resistance mean values so that the as-manufactured resistance value for one resistor is generally independent of the as-manufactured resistance value for each other resistor, each of said plurality of statistically independent resistors having an as-manufactured resistance value with a predefined standard deviation.

14. A current generator according to claim 12 wherein said plurality of different types of resistors comprises no more than six different types of resistors.

15. A method for ensuring reproducible and accurate current outputs in current generators manufactured in different wafer lots comprising the steps of:

providing a semiconductor wafer having a plurality of semiconductor die;

forming a plurality of voltage reference circuits in the plurality of semiconductor die;

forming a plurality of n different types of resistors electrically connected in series for each of the respective plurality of voltage reference circuits in the plurality of semiconductor die said plurality of n different types of resistors being selected from the group consisting of diffused resistors, implanted resistors, thin film resistors, metal resistors, and composite resistors; and

forming an electrical connection between each of the plurality of voltage reference circuits and each of the plurality of n different types of resistors such that an output voltage from respective ones of the voltage reference circuits applied across each of the respective plurality of n different types of resistors would produce a plurality of respective output currents.

16. A method according to claim 15 wherein the step of forming a plurality of n different types of resistors comprises the step of forming a plurality of n statistically independent resistors having respective as-manufactured resistance values varied from respective target resistance mean values so that the as-manufactured resistance value for one resistor is generally independent of the as-manufactured resistance value for each other resistor, each resistor of said plurality of statistically independent resistors having an as-manufactured resistance value with a predefined standard deviation across manufacturing wafer lots.

17. A method according to claim 15 wherein the step of forming a plurality of n different types of resistors comprises the step of forming a plurality of statistically independent resistors having respective as-manufactured resistance values varied from respective target resistance mean values so that the as-manufactured resistance value for one resistor is generally independent of the as-manufactured resistance value for each other resistor, the plurality of n statistically independent resistors having a total as-manufactured resistance value with a predefined standard deviation across manufacturing wafer lots.

18. A method according to claim 15 wherein the step of forming a plurality of n different types of resistors comprises the step of forming no more than six different types of resistors electrically connected in series for each of the respective plurality of voltage reference circuits formed in the plurality of semiconductor die.

19. A method according to claim 15 and further comprising the steps of providing an output voltage from respective ones of the voltage reference circuits across each of the respective plurality of n different types of resistors to produce a plurality of respective as-manufactured output currents each having a predefined standard deviation across manufacturing wafer lots.

20. A method according to claim 19 and further comprising the steps of:

forming a plurality of circuits having current inputs in the plurality of semiconductor die; and

providing the plurality of respective output currents to the plurality of current inputs in the plurality of semiconductor die.

21. A method for ensuring reproducible and accurate currents in different wafer lots comprising the steps of:

providing a semiconductor wafer having a plurality of semiconductor die, each die comprising a voltage reference circuit; and

forming a plurality of n statistically independent resistors in each of the voltage reference circuits of the plurality of semiconductor die to thereby define current generators, the plurality of n statistically independent resistors having respective as-manufactured resistance values varied from respective target resistance mean values so that the as-manufactured resistance value for one resistor is generally independent of the as-manufactured resistance value for each other resistor and having a total as-manufactured resistance value with a predefined standard deviation across manufacturing wafer lots.

22. A method according to claim 21 wherein the step of forming a plurality of n different types of statistically independent resistors comprises the step of forming no more than six statistically independent resistors electrically connected in series in the plurality of semiconductor die.

23. A method according to claim 21 wherein the step of forming a plurality of n different types of statistically independent resistors comprises the step of forming a plurality of n different types of statistically independent resistors selected from the group consisting of diffused resistors, implanted resistors, thin film resistors, metal resistors, and composite resistors.

24. A method according to claim 21 wherein the step of forming a plurality of n different types of statistically independent resistors comprises the step of forming a plurality of n different types of statistically independent resistors, each of said plurality of statistically independent resistors being selected according to:

##EQU19## where r_T =total target resistance mean value of the resistor ladder;

σ

_T =standard deviation of the total as-manufactured resistance value of the resistor ladder across manufacturing wafer lots;

x_i =a number greater than one which represents the target resistance mean value of each statistically independent resistor, ri, as some fraction of the total target resistance mean value;

σ

_i =standard deviation of the as-manufactured resistance value of the ith statistically independent resistor, r_i, in the resistor ladder across manufacturing wafer lots; and

where the target mean resistance value of each statistically independent resistor, r_i,=r_T /x_i.