Frequency multiplier circuit

• US 5,703,509 A
• Filed: 08/14/1996
• Issued: 12/30/1997
• Est. Priority Date: 08/14/1995
• Status: Expired due to Fees

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Hirata, Masaru
• Primary Examiner(s): Callahan, Timothy P.
• Assistant Examiner(s): ZWEIZIG, JEFFERY SHAWN
• Application Number:
  US08/696,622
• Time in Patent Office: 503 Days
• Field of Search: 327/113, 327/114, 327/116, 327/119, 327/120, 327/122, 327/231, 327/238, 327/254, 327/255, 327/355
• US Class Current: 327/119
• CPC Class Codes: H03B 19/00 Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source transference of modulation from one carrier to another H03D7/00
• CPC Class Codes: H03D 2200/0047 Offset of DC voltage or frequency
• CPC Class Codes: H03D 7/1433 using bipolar transistors H03D7/145 takes precedence
• CPC Class Codes: H03D 7/1458 Double balanced arrangements, i.e. where both input signals are differential

Abstract

A frequency multiplier circuit that needs no coupling capacitors and no input bias circuits for a next-stage circuit, which includes a phase-shifted signal generator, first and second differential amplifiers, and a multiplier. The phase-shifted signal generator receives an initial input signal and generates first and second output signals whose phases are shifted by 90° with each other. The first differential amplifier amplifies the first output signal to output a first positive-phase output signal and a first negative-phase output signal. The second differential amplifier amplifies the second output signal to output a second positive-phase output signal and a second negative-phase output signal. The multiplier multiplies the first and second positive-phase output signals to output a third positive-phase output signal as a positive-phase output of the frequency multiplier circuit. At the same time, it multiplies the first and second negative-phase output signals to output a third negative-phase output signal as a negative-phase output of the frequency multiplier circuit. Each of the third positive- and negative-phase output signals has a doubled frequency of the initial input signal and substantially the same dc offset voltage.

Claims

1. A frequency multiplier circuit comprising:

a phase-shifted signal generator for receiving an initial input signal to generate first and second output signals whose phases are shifted by 90°

with each other;

a first differential amplifier for receiving said first output signal to amplify said first output signal and for outputting a first positive-phase output signal and a first negative-phase output signal;

a second differential amplifier for receiving said second output signal to amplify said second output signal and for outputting a second positive-phase output signal and a second negative-phase output signal;

a multiplier for receiving said first and second positive-phase output signals to multiply said first and second positive-phase output signals, outputting a third positive-phase output signal as a positive-phase output of said frequency multiplier circuit, receiving said first and second negative-phase output signals to multiply said first and second negative-phase output signals, and outputting a third negative-phase output signal as a negative-phase output of said frequency multiplier circuit;

wherein each of said third positive- and negative-phase output signals has a doubled frequency of said initial input signal and substantially the same dc offset voltage.

2. The circuit as claimed in claim 1, wherein said phase-shifted signal generator includes an integrator and a differentiator connected in parallel.

3. The circuit as claimed in claim 2, wherein said integrator has a first resistor and a first capacitor and said differentiator includes a second resistor and a second capacitor;

and wherein said first and second resistors have the same resistance value, and said first and second capacitors have the same capacitance value.

4. A frequency multiplier circuit comprising:

a differential amplifier for receiving an initial input signal to amplify said initial input signal and for outputting a first positive-phase output signal and a first negative-phase output signal;

a first phase-shifted signal generator for receiving said first positive-phase output signal to generate first and second output signals whose phases are shifted by 90°

with each other;

a second phase-shifted signal generator for receiving said first negative-phase output signal to generate third and fourth output signals whose phases are shifted by 90°

with each other; and

a multiplier for receiving said first and second output signals to multiply said first and second output signals, outputting a second positive-phase output signal as a positive-phase output of said frequency multiplier circuit, receiving said third and fourth output signals to multiply said third and fourth output signals, and outputting a second negative-phase output signal as a negative-phase output of said frequency multiplier circuits,

wherein each of said second positive- and negative-phase output signals has a doubled frequency of said initial input signal and substantially the same dc offset voltage.

5. The circuit as claimed in claim 4, wherein each of said phase-shifted signal generators includes an integrator and a differentiator connected in parallel.

6. The circuit as claimed in claim 5, wherein said integrator has a first resistor and a first capacitor and said differentiator includes a second resistor and a second capacitor;

and wherein said first and second resistors have the same resistance value, and said first and second capacitors have the same capacitance value.