Predictive snooping of cache memory for master-initiated accesses

  • US 5,710,906 A
  • Filed: 07/07/1995
  • Issued: 01/20/1998
  • Est. Priority Date: 07/07/1995
  • Status: Expired due to Term
First Claim
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1. A method for transferring a plurality of data units between a bus master and a respective plurality of memory locations at sequential memory location addresses in an address space of a secondary memory, for use with a host processing unit and a first cache memory which caches memory locations of said secondary memory for said host processing unit, said first cache memory having a line size of l bytes, comprising the steps of:

  • sequentially transferring data units between said bus master and said secondary memory beginning at a starting memory location address in said secondary memory address space and continuing beyond an l-byte boundary of said secondary memory address space, said sequentially transferred data units including a last data unit before said l-byte boundary and a first data unit beyond said l-byte boundary; and

    initiating a next-line inquiry, prior to completion of the transfer of the last data unit before said l-byte boundary, to determine whether an N+1'"'"'th l-byte line of said secondary memory is cached in a modified state in said first cache memory, said N+1'"'"'th l-byte line being a line of said secondary memory which includes said first data unit beyond said l-byte boundary.

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