Flash EEPROM system

CAFC
  • US 5,719,808 A
  • Filed: 03/21/1995
  • Issued: 02/17/1998
  • Est. Priority Date: 04/13/1989
  • Status: Expired due to Term
First Claim
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1. A method of operating a memory system having an array of EEPROM cells divided into multiple non-overlapping sectors that individually contain a plurality of said cells sufficient to store multiple bytes of data and which are erasable together, comprising:

  • (a) initially tagging a plurality of said multiple sectors to be erased,(b) subjecting the EEPROM cells of the tagged sectors in parallel to erase voltages while the remaining multiple sectors are not so subjected,(c) thereafter verifying whether individual ones of the tagged sectors have become erased,(d) clearing the tags from those sectors which are verified to have become erased while continuing to subject remaining tagged sectors to erase voltages, and(e) repeating operations (b) through (d) until the tags have been cleared from all of the initially tagged sectors, thereby to erase all the initially tagged sectors.

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