Lateral IGBT

• US 5,731,603 A
• Filed: 08/22/1996
• Issued: 03/24/1998
• Est. Priority Date: 08/24/1995
• Status: Expired due to Term

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Matsudai, Tomoko, Funaki, Hideyuki, Nakagawa, Akio
• Primary Examiner(s): FAHMY, WAEL M
• Application Number:
  US08/701,500
• Time in Patent Office: 579 Days
• Field of Search: 257/139, 257/140, 257/141, 257/144, 257/162, 257/163, 257/335, 257/341, 257/401, 257/350
• US Class Current: 257/141
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/66325 controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
• CPC Class Codes: H01L 29/7394 on an insulating layer or substrate, e.g. thin film device or device isolated from the bulk substrate H01L29/7398 takes precedence
• CPC Class Codes: H01L 29/7398 with both emitter and collector contacts in the same substrate side

Abstract

A sub-gate electrode is arranged to face, through a gate insulating film, a surface of a first p-type base layer which is interposed between a first n-type source layer and an n-type drift layer, and a surface of a second p-type base layer which is interposed between a second n-type source layer and the n-type drift layer and faces the first p-type base layer. A main gate electrode is arranged to face, through a gate insulating film, a surface of the second p-type base layer which is interposed between the second n-type source layer and the n-type drift layer and does not face the first p-type base layer. Three n-type MOSFETs are constructed such that one n-type channel is to be formed in the first p-type base layer and two n-type channels are to be formed in the second p-type base layer. The three channels are to be formed, so that the channel width is effectively enlarged and the current density is increased. The second p-type base layer has a length of 10 μm or less in the drifting direction.

Claims

1. A lateral IGBT comprising:

a drift layer of a first conductivity type formed by using a semiconductor active layer of a high resistance arranged on an insulating film;

a drain layer of a second conductivity type comprising first and second portions formed in a common surface of said drift layer;

a base layer of the second conductivity type formed in said common surface of said drift layer between said first and second portions of said drain layer;

a source layer of the first conductivity type formed in a surface of said base layer;

a drain electrode arranged in contact with said drain layer;

a source electrode arranged in contact with said source and base layers; and

a main gate electrode comprising first and second portions facing, through a gate insulating film, surfaces of said base layer which are interposed between said source layer and said drift layer, and are located on sides facing said first and second portions of said drain layer, respectively,

wherein said base layer comprises first and second portions facing each other through an intervening portion which is part of said drift layer,

said source layer comprises first and second portions respectively formed in surfaces of said first and second portions of said base layer, and

a sub-gate electrode is arranged to face, through a gate insulating film, a surface of said first portion of said base layer which is interposed between said first portion of said source layer and said intervening portion, and a surface of said second portion of said base layer which is interposed between said second portion of said source layer and said intervening portion.

2. The IGBT according to claim 1, wherein said first and second portions of said base layer are arranged separate from each other along a first direction connecting said drain layer and said source layer.

3. The IGBT according to claim 2, wherein a length of said base layer in said first direction between each of said first and second portions of said drain layer and said intervening portion is set smaller than a thickness of said drift layer.

4. The IGBT according to claim 2, wherein a length of said base layer in said first direction between said drain layer and said intervening portion is set at 10 μ

m or less.

5. The IGBT according to claim 2, wherein a length of said intervening portion in said first direction is set to be equal to or larger than a depth of the base layer.

6. The IGBT according to claim 2, each of said first and second portions of said source layer has a strip shape having a plurality of openings, through which said base layer is in contact with said source electrode.

7. The IGBT according to claim 2, wherein said base layer is formed to have a portion surrounding said drain layer.

8. The IGBT according to claim 1, further comprises a diffusion layer of the first conductivity type formed in said intervening portion and having a resistance lower than that of said drift layer.

9. The IGBT according to claim 1, wherein said source electrode comprises an extending portion arranged in a trench formed in said base layer, and is in contact with said base layer through said extending portion.

10. The IGBT according to claim 1, wherein said gate insulating films have a thickness less than 60 nm.

11. The IGBT according to claim 3, wherein a length of said base layer in said first direction between said drain layer and said intervening portion is set at 10 μ

m or less.

12. The IGBT according to claim 11, wherein a length of said intervening portion in said first direction is set to be equal to or larger than a depth of the base layer.

13. The IGBT according to claim 3, wherein a length of said intervening portion in said first direction is set to be equal to or larger than a depth of the base layer.

14. The IGBT according to claim 4, wherein a length of said intervening portion in said first direction is set to be equal to or larger than a depth of the base layer.