Computer methods and apparatus for eliminating leading non-significant digits in floating point computations
First Claim
1. A method for generating a signal representing a shift amount for shifting a significand of a result of an operation on one or more floating point numbers to eliminate one or more leading non-significant digits of the significand, wherein the significand has zero or more leading non-significant digits and wherein the shift amount itself is comprised of one or more digits, the method comprising the steps of:
- providing to an electrical circuit a signal representing significands of the one or more numbers;
providing to the electrical circuit a signal representing a maximum value which the shift amount is not to exceed; and
generating by the electrical circuit a signal representing at least one digit of the minimum of;
(1) the total number of the leading non-significant digits of the significand of the result, the total number being greater than or equal to zero; and
(2) said maximum value, said minimum being the shift amount, the electrical circuit being for generating said signal representing at least one digit of said minimum.
1 Assignment
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Accused Products
Abstract
A leading 0/1 anticipator (LZA) generates a signal representing the exact number of leading non-significant binary digits in the significand of the result of an addition of two floating point numbers. The exact number is provided because the LZA takes into account all the carries of the addition operation providing the significand of the result. The signal generated by the LZA is used for normalization as a shift amount by which the significand of the result is shifted. The signal is generated as a binary number, that is, as a plurality of binary signals each of which represents one binary digit of the number of the leading non-significant digits. In some floating point addition operations, the LZA receives a signal representing a maximum value of the number of non-significant digits that can be eliminated. The shift amount generated by the LZA does not exceed this maximum value. Taking into account the maximum value does not create an additional delay. The floating point unit includes two subunits one of which includes the LZA and the other one of which does not include the LZA. The other subunit handles the addition for the cases when the normalization requires a shift by at most a few digits, for example, at most one digit.
107 Citations
50 Claims
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1. A method for generating a signal representing a shift amount for shifting a significand of a result of an operation on one or more floating point numbers to eliminate one or more leading non-significant digits of the significand, wherein the significand has zero or more leading non-significant digits and wherein the shift amount itself is comprised of one or more digits, the method comprising the steps of:
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providing to an electrical circuit a signal representing significands of the one or more numbers; providing to the electrical circuit a signal representing a maximum value which the shift amount is not to exceed; and generating by the electrical circuit a signal representing at least one digit of the minimum of;
(1) the total number of the leading non-significant digits of the significand of the result, the total number being greater than or equal to zero; and
(2) said maximum value, said minimum being the shift amount, the electrical circuit being for generating said signal representing at least one digit of said minimum. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A system comprising:
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an input for receiving (a) a first signal representing one or more significands of one or more floating point numbers, and (b) a second signal representing a maximum value of a shift amount for shifting a significand of a result of an operation on the one or more numbers to eliminate one or more leading non-significant digits from the significand of the result when the significand of the result has one or more leading non-significant digits, the shift amount being greater than or equal to zero; and a circuit for receiving the first and second signals from the input and generating a third signal representing at least one digit of the shift amount, the shift amount being the minimum of (1) the number of the leading non-significant digits and (2) the maximum value. - View Dependent Claims (10, 11, 12, 13, 14)
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15. A method for providing a computer system, the method comprising:
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providing an input for receiving (a) a first signal representing one or more significands of one or more floating point numbers, and (b) a second signal representing a maximum value of a shift amount for shifting a significand of a result of an operation on the one or more numbers to eliminate one or more leading non-significant digits from the significand of the result when the significand of the result has one or more leading non-significant digits, the shift amount being greater than or equal to zero; and providing a circuit for receiving the first and second signals from the input and generating a third signal representing at least one digit of the shift amount, the shift amount being the minimum of (1) the number of the leading non-significant digits and (2) the maximum value. - View Dependent Claims (16, 17, 18, 19)
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20. A method for performing an operation on two floating point numbers NN1 and NN2, the method comprising:
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(A) obtaining a binary representation of significands sig1=A1 A2 . . . AN and sig2=B1 B2 . . . BM of the respective floating point numbers NN1 and NN2, wherein A1 and B1 are the most significant bits of the respective significands sig1 and sig2 and AN and BM are the least significant bits of the respective significands sig1 and sig2, and wherein further N≧
2 and M≧
2;(B) generating from the binary representation of the significands a signal representing one or more of the following functions; (a) one or more carry propagate functions; (b) one or more carry generate functions; (c) one or more functions Ci1, wherein Ci1 is a carry into bit i1 of the sum of the two significands; (d) one or more functions TTi2-j2, wherein j2≧
i2+1 and TTi2-j2 is the product (AND) of all Tk =Ak ⊕
Bk (exclusive OR) such that k varies from i2 to j2;(e) one or more functions ZZi3-j3, wherein j3≧
i3+1 and ZZi3-j3 is the product of all Zk =Ak NOR Bk such that k varies from i3 to j3;(f) one or more functions GGi4-j4, wherein j4≧
i4+1 and GGi4-j4 is the product of all Gk =Ak ·
Bk such that k varies from i4 to j4;(g) one or more functions TZi5-j5, wherein j5≧
i5+1 and
space="preserve" listing-type="equation">TZ.sub.i5-j5 =G.sub.i5 ·
Z.sub.i5+1 ·
. . . ·
Z.sub.j5 +T.sub.i5 ·
G.sub.i5+1 ·
Z.sub.i5+2 ·
. . . ·
Z.sub.j5 + . . . +T.sub.i5 ·
T.sub.i5+1 ·
. . . ·
T.sub.j5-1 ·
G.sub.j5 ;(h) one or more functions TGi6-j6, wherein j6≧
i6+1 and
space="preserve" listing-type="equation">TG.sub.i6-j6 =Z.sub.i6 ·
G.sub.i6+1 ·
. . . ·
G.sub.j6 +T.sub.i6 ·
Z.sub.i6+1 ·
G.sub.i6+2 ·
. . . ·
G.sub.j6 + . . . +T.sub.i6 ·
T.sub.i6+1 ·
. . . ·
T.sub.j6-1 ·
Z.sub.j6 ;(C) providing the signal generated at step (B) to an input of a combinatorial circuit; and (D) generating by the combinatorial circuit a signal representing at least one digit of a shift amount for shifting a significand sig3 of the result of the operation to eliminate at least one leading non-significant digit from the significand sig3 if the significand sig3 has a leading non-significant digit. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27)
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28. A system comprising:
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a circuit CIRC1 for receiving a signal representing two significands sig1=A1 A2 . . . AN and sig2=B1 B2 . . . BM of respective two floating point numbers NN1 and NN2, wherein A1 and B1 are the most significant bits of the respective significands sig1 and sig2 and AN and BM are the least significant bits of the respective significands sig1 and sig2, and wherein further N≧
2 and M≧
2, the circuit CIRC1 being also for generating a signal representing one or more of the following functions;(a) one or more carry propagate functions; (b) one or more carry generate functions; (c) one or more functions Ci1, wherein Ci1 is a carry into bit i1 of the sum of the two significands; (d) one or more functions TTi2-j2, wherein j2≧
i2+1 and TTi2-j2 is the product (AND) of all Tk =Ak ⊕
Bk (exclusive OR) such that k varies from i2 to j2;(e) one or more functions ZZi3-j3, wherein j3≧
i3+1 and ZZi3-j3 is the product of all Zk =Ak NOR Bk such that k varies from i3 to j3;(f) one or more functions GGi4-j4, wherein j4≧
i4+1 and GGi4-j4 is the product of all Gk =Ak ·
Bk such that k varies from i4 to j4;(g) one or more functions TZi5-j5, wherein j5≧
i5+1 and
space="preserve" listing-type="equation">TZ.sub.i5-j5 =G.sub.i5 ·
Z.sub.i5+1 ·
. . . ·
Z.sub.j5 +T.sub.i5 ·
G.sub.i5+1 ·
Z.sub.i5+2 ·
. . . ·
Z.sub.j5 + . . . +T.sub.i5 ·
T.sub.i5+1 ·
. . . ·
T.sub.j5-1 ·
G.sub.j5 ;(h) one or more functions TGi6-j6, wherein j6≧
i6+1 and
space="preserve" listing-type="equation">TG.sub.i6-j6 =Z.sub.i6 ·
G.sub.i6+1 ·
. . . ·
G.sub.j6 +T.sub.i6 ·
Z.sub.i6+1 ·
G.sub.i6+2 ·
. . . ·
G.sub.j6 + . . . +T.sub.i6 ·
T.sub.i6+1 ·
. . . ·
T.sub.j6-1 ·
Z.sub.j6 ;a combinatorial circuit for receiving the signal generated by the circuit CIRC1 and for generating a signal representing at least one digit of a shift amount for shifting a significand of a result of an operation on the two floating point numbers to eliminate at least one non-significant digit from the significand of the result if the significand of the result has a leading non-significant digit. - View Dependent Claims (29, 30, 31, 32, 33, 34)
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35. A method for providing a computer system, the method comprising:
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providing a circuit CIRC1 for receiving a signal representing two significands sig1=A1 A2 . . . AN and Sig2=B1 B2 . . . BM of respective two floating point numbers, wherein A1 and B1 are the most significant bits of the respective significands sig1 and sig2 and AN and BM are the least significant bits of the respective significands sig1 and sig2, and wherein further N≧
2 and M≧
2, the circuit CIRC1 being also for generating a signal representing one or more of the following functions;(a) one or more carry propagate functions; (b) one or more carry generate functions; (c) one or more functions Ci1, wherein Ci1 is a carry into bit i1 of the sum of the two significands; (d) one or more functions TTi2-j2, wherein j2≧
i2+1 and TTi2-j2 is the product (AND) of all Tk =Ak ⊕
Bk (exclusive OR) such that k varies from i2 to j2;(e) one or more functions ZZi3-j3, wherein j3≧
i3+1 and ZZi3-j3 is the product of all Zk =Ak NOR Bk such that k varies from i to j;(f) one or more functions GGi4-j4, wherein j4≧
i4+1 and GGi4-j4 is the product of all Gk =Ak ·
Bk such that k varies from i to j;(g) one or more functions TZi5-j5, wherein j5≧
i5+1 and
space="preserve" listing-type="equation">TZ.sub.i5-j5 =G.sub.i5 ·
Z.sub.i5+1 ·
. . . ·
Z.sub.j5 +T.sub.i5 ·
G.sub.i5+1 ·
Z.sub.i5+2 ·
. . . ·
Z.sub.j5 + . . . +T.sub.i5 ·
T.sub.i5+1 ·
. . . ·
T.sub.j5-1 ·
G.sub.j5 ;(h) one or more functions TGi6-j6, wherein j6≧
i6+1 and
space="preserve" listing-type="equation">TG.sub.i6-j6 =Z.sub.i6 ·
G.sub.i6+1 ·
. . . ·
G.sub.j6 +T.sub.i6 ·
Z.sub.i6+1 ·
G.sub.i6+2 ·
. . . ·
G.sub.j6 + . . . +T.sub.i6 T.sub.i6+1 ·
. . . ·
T.sub.j6-1 ·
Z.sub.j6 ;providing a combinatorial circuit for receiving the signal generated by the circuit CIRC1 and for generating a signal representing at least one digit of a shift amount for shifting a significand of a result of an operation on the two floating point numbers to eliminate at least one non-significant digit from the significand of the result if the significand of the result has a leading non-significant digit. - View Dependent Claims (36)
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37. A system comprising a floating point unit which comprises:
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an input for receiving a first signal representing one or more floating point operands; a first circuit for generating a second signal representing a significand of the result of an operation on the one or more operands; a leading zero/one anticipator (LZA) for generating a third signal representing a shift amount SHIFT1 by which the significand of the result is to be shifted to eliminate at least one leading non-significant digit from the significand of the result if (1) the significand of the result has a leading non-significant digit, and if (2) the LZA is to be used to provide a result of the operation; a second circuit for receiving the second and third signals and for shifting significand represented by the second signal by the shift amount SHIFT1; a third circuit for receiving the second signal and for shifting a significand represented by the second signal by a shift amount SHIFT2 determined independently of the LZA, wherein both of the second and third circuits are to perform their shifting functions during the operation; and a circuit for selecting either; (a) a significand provided by the second circuit if the LZA is to be used, or (b) a significand provided by the third circuit if the LZA is not to be used. - View Dependent Claims (38, 39, 40, 41, 42, 43, 44)
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45. A method for performing an operation on one or more floating point numbers by a floating point unit, the method comprising:
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determining whether a leading zero/one anticipator (LZA) is to be used to provide a result of the operation; generating a first signal representing a significand of the result of the operation; generating by the LZA a second signal representing a shift amount SHIFT1 by which the significand of the result is to be shifted to eliminate at least one leading non-significant digit from the significand of the result if (1) the significand of the result has a leading non-significant digit, and if (2) the LZA is to be used to provide a result of the operation; and independently of the LZA, generating a third signal representing a shift amount SHIFT2 by which the significand of the result is to be shifted to eliminate at least one leading non-significant digit from the significand of the result if (1) the significand of the result has a leading non-significant digit, and if (2) the LZA is not to be used to provide a result of the operation; if the significand of the result has a leading non-significant digit to be eliminated by a shift of the significand of the result, then shifting by a circuit the significand of the result by; the shift amount SHIFT1 if the LZA is to be used;
orthe shift amount SHIFT2 if the LZA is not to be used. - View Dependent Claims (46, 47, 48)
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49. A method for providing a floating point unit, the method comprising:
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providing an input for receiving a first signal representing one or more floating point operands; providing a first circuit for generating a second signal representing a significand of the result of an operation on the one or more operands; providing a leading zero/one anticipator (LZA) for generating a third signal representing a shift amount SHIFT1 by which the significand of the result is to be shifted to eliminate at least one leading non-significant digit from the significand of the result if (1) the significand of the result has a leading non-significant digit, and if (2) the LZA is to be used to provide a result of the operation; providing a second circuit for receiving the second and third signals and for shifting a significand represented by the second signal by the shift amount SHIFT1; providing a third circuit for receiving the second signal and for shifting a significand represented by the second signal by a shift amount SHIFT2 determined independently of the LZA, wherein both of the second and third circuits are to perform their shifting functions during the operation; and providing a circuit for selecting either; (a) a significand provided by the second circuit if the LZA is to be used, or (b) a significand provided by the third circuit if the LZA is not to be used. - View Dependent Claims (50)
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Specification