Power saving technique for battery powered devices

• US 5,734,291 A
• Filed: 03/11/1996
• Issued: 03/31/1998
• Est. Priority Date: 03/11/1996
• Status: Expired due to Fees

• Current Assignee: Microchip Technology Incorporated
• Original Assignee: TelCom Semiconductor, Inc. (Microchip Technology Incorporated)
• Inventors: Collings, Jerry M., Tasdighi, Ali
• Primary Examiner(s): Cunningham, Terry
• Application Number:
  US08/613,999
• Time in Patent Office: 750 Days
• Field of Search: 327/534, 327/535, 327/536, 327/537
• US Class Current: 327/537
• CPC Class Codes: H02H 3/07 and with permanent disconnection after a predetermined number of reconnection cycles

Abstract

An integrated circuit voltage converter containing a capacitive charge pump performing DC to DC conversion is disclosed which detects, either automatically or by an external signal, the onset of a low power consumption situation and switches to a low power consumption mode. In one embodiment, the low power consumption mode is accomplished by reducing the operating frequency of the charge pump. In another embodiment, the switching transistors used to switch the capacitors in the charge pump during a low power consumption mode are smaller than those transistors used to switch the capacitors during its normal operating mode. In another embodiment, the DC to DC converter switches back and forth between a high frequency (burst) mode and a low frequency (low power) mode at intervals. In another embodiment, a combination of the power reduction techniques is used. Various techniques for detecting when a low power consumption mode is appropriate are also described.

Claims

1. An integrated single-chip circuit comprising:

a switching charge pump which receives a first voltage from a power supply and outputs a second voltage different from said first voltage, said charge pump incorporating switching transistors which draw an operating current from said power supply;

an oscillator connected to said switching transistors within said charge pump for controlling an operating frequency of said charge pump; and

a low power consumption detection circuit for detecting when a low power consumption mode of said charge pump is appropriate and, in response to such detecting, for causing said switching transistors in said charge pump to draw less current from said power supply, said low power consumption detection circuit comprising;

an impedance in series between a load and a terminal of said charge pump, wherein a current through said load is reflected by a current through said impedance; and

a detector for determining a voltage drop across said impedance and for generating a signal reflecting whether a current into said load is below a threshold current.

2. The circuit of claim 1 wherein said low power consumption detection circuit receives a first signal and causes an operating frequency of said charge pump to be lowered.

3. The circuit of claim 1 wherein said low power consumption detection circuit is connected to said charge pump and controls said switching transistors within said charge pump to have a lower effective capacitance so as to draw less current from said power supply during each switching cycle of said charge pump.

4. The circuit of claim 3 wherein said charge pump comprises two or more capacitors controllably connected together by said switching transistors operating at the operating frequency of said charge pump, wherein one or more of said switching transistors comprise:

a first switching transistor and a second switching transistor connected in parallel during a normal operating mode and not connected in parallel during said low power consumption mode, said first switching transistor being larger than said second switching transistor.

5. The circuit of claim 3 wherein said charge pump comprises two or more capacitors controllably connected together by said switching transistors operating at the operating frequency of said charge pump, wherein one or more of said switching transistors comprise:

a first transistor and a second transistor, said first switching transistor being larger than said second switching transistor, said first switching transistor being enabled when providing a switching function at said operating frequency in a normal mode of said charge pump, said second switching transistor being enabled, while said first switching transistor is disabled, for providing a switching function at said operating frequency during said low power consumption mode of said charge pump.

6. The circuit of claim 1 wherein said charge pump comprises two or more capacitors controllably connected together by said switching transistors operating at said operating frequency of said charge pump, wherein said two or more capacitors are connected external to an integrated circuit package housing said switching transistors.

7. The circuit of claim 1 wherein said low power consumption detection circuit receives a first signal and causes an operating frequency of said charge pump to be lowered to less than one tenth of the operating frequency of said charge pump during a normal mode of said charge pump.

8. The circuit of claim 7 wherein said low power consumption detection circuit also receives a second signal and causes said operating frequency of said charge pump to be lowered to a frequency lower than said operating frequency during said low power consumption mode.

9. The circuit of claim 1 wherein said low power consumption detection circuit receives a first signal and causes an operating frequency of said charge pump to be lowered to less than one hundredth of the operating frequency of said charge pump during a normal mode of said charge pump.

10. The circuit of claim 1 wherein said switching transistors are MOS transistors.

11. The circuit of claim 1 wherein causing said switching transistors in said charge pump to draw less current from said power supply comprises lowering said operating frequency of said charge pump.

12. The circuit of claim 1 further comprising one or more buffers on the same integrated circuit chip as said charge pump, said one or more buffers being powered by an output voltage of said charge pump, said one or more buffers having an input pin and an output pin extending from an integrated circuit package housing said charge pump.

13. The circuit of claim 12 wherein said circuit is configured as an RS-232 transceiver.

14. The circuit of claim 1 wherein said oscillator comprises two or more oscillators, each of said oscillators generating a different frequency.

15. The circuit of claim 1 wherein said low power consumption detection circuit comprises:

a comparator for comparing a first voltage representative of an output voltage of said charge pump with a threshold voltage and, upon detection of said first voltage being greater than said threshold voltage, controlling said switching transistors in said charge pump to draw less current from said power supply.

16. The circuit of claim 15 further comprising a timer for causing said charge pump to be switched into said low power consumption mode after a period of time after said first voltage is detected as being above said threshold voltage.

17. The circuit of claim 16 where said period of time is based on a time it takes for said first voltage to fall below said threshold voltage when said charge pump is in said low power consumption mode.

18. A method for lowering the power consumption of a switching type charge pump comprising the steps of:

receiving a voltage from a power supply into said charge pump;

detecting the onset of a low power consumption mode by passing current flowing from said charge pump into a load through an impedance in series between said load and a terminal of said charge pump, wherein the current through said load is reflected by the current through said impedance, determining a voltage drop across said impedance and generating a signal reflecting whether said current into said load is below a threshold current;

controlling an oscillator to output an operating frequency in response to said detecting;

driving switching transistors within said charge pump with said operating frequency; and

causing said switching transistors within said charge pump to draw less current from said power supply connected to said charge pump by changing said operating frequency of said oscillator.

19. The method of claim 18 wherein said step of causing said switching transistors within said charge pump to draw less current from said power supply comprises of the step of:

lowering an operating frequency of said switching transistors.

20. The method of claim 19 wherein said step of lowering said operating frequency of said switching transistors comprises the step of reducing said operating frequency of said switching transistors to less than one-tenth the operating frequency in a normal mode of operation to place said charge pump in said low power consumption mode.

21. The method of claim 18 wherein said switching transistors comprise first type switching transistors and second type switching transistors, said first type being larger than said second type, and wherein said step of causing said switching transistors within said charge pump to draw less current from said power supply comprises the step of disabling said first type switching transistors in said charge pump while allowing said second type switching transistors in said charge pump to controllably connect together two or more capacitors in said charge pump for generating a charge pump output voltage.