Reducing switching losses in series connected bridge inverters and amplifiers

• US 5,734,565 A
• Filed: 08/16/1996
• Issued: 03/31/1998
• Est. Priority Date: 08/16/1996
• Status: Expired due to Fees

• Current Assignee: American Superconductor Corporation
• Original Assignee: American Superconductor Corporation
• Inventors: Gran, Richard J., Mueller, Otward M.
• Primary Examiner(s): Krishnan, Aditya
• Application Number:
  US08/698,943
• Time in Patent Office: 592 Days
• Field of Search: 363/35-41, 363/64-66, 363/71-75, 363/115-116, 363/131-136
• US Class Current: 363/132
• CPC Class Codes: H02M 7/4835 comprising two or more cells, each including a switchable capacitor, the capacitors having a nominal charge voltage which corresponds to a given fraction of the input voltage, and the capacitors being selectively connected in series to determine the instantaneous output voltage
• CPC Class Codes: H02M 7/49 Combination of the output voltage waveforms of a plurality of converters

Abstract

A staggered-frequency AC inverter includes at least first and second pulse width modulated bridge circuits connected in series. The first bridge circuit receives a DC voltage and operates at a first pulse width modulated switch frequency to generate a first output corresponding to a first region of the AC signal. The second bridge circuit receives a DC voltage and operates at a second pulse width modulated switch frequency substantially lower than the first frequency. The second bridge circuit generates a second output corresponding to a second region of the AC signal in which the AC signal changes less rapidly than in the first region, minus a maximum voltage magnitude of the first region. Another aspect of the invention features a staggered-voltage multiple-phase circuit having at least a first-phase portion for generating a voltage signal in a first phase, and a second-phase portion for generating the voltage signal in a second phase. Each phase portion includes a first circuit that generates a first output corresponding to a plurality of segments of the voltage signal minus a corresponding plurality of constant values, and a second circuit connected in series with the first circuit that generates a second output corresponding to at least some of the plurality of constant values. Independent and isolated power supplies are connected to each first and second circuit in each of the first-phase and second-phase portions. Alternatively, an output transformer having first and second independent and isolated primary coils is connected to respective outputs of the first-phase and second-phase portions.

Claims

1. A staggered-frequency AC inverter or amplifier comprising:

a first pulse width modulated bridge circuit configured to receive a DC voltage and to operate at a first pulse width modulated switch frequency to generate a first output corresponding to an AC signal in a first region of the AC signal;

at least a second pulse width modulated bridge circuit connected in series with the first pulse width modulated bridge circuit and configured to receive a DC voltage and to operate at a second pulse width modulated switch frequency substantially lower than the first pulse width modulated switch frequency to generate a second output corresponding to the AC signal in a second region of the AC signal in which the AC signal changes less rapidly than in the first region, minus a maximum voltage magnitude of the first region; and

pulse width modulation circuitry arranged to modulate the first pulse width modulated bridge circuit at the first pulse width modulated frequency to generate the first output when the AC signal is in the first region and to modulate the second pulse width modulated bridge circuit at the second pulse width modulated frequency to generate the second output when the AC signal is in the second region different from the first region.

2. A staggered-frequency AC inverter or amplifier in accordance with claim 1 further comprising:

a third pulse width modulated bridge circuit connected in series with the first and second pulse width modulated bridge circuits and configured to receive a DC voltage and to operate at a third pulse width modulated switch frequency substantially lower than the first and second pulse width modulated switch frequencies to generate a third output corresponding to the AC signal in a third region of the AC signal in which the AC signal changes less rapidly than in the first and second region, minus a maximum voltage magnitude of the second region.

3. A staggered-frequency inverter or amplifier in accordance with claim 2 wherein the first pulse width modulated switch frequency is approximately 5 kHz, the second pulse width modulated switch frequency is approximately 3 kHz, and the third pulse width modulated switch frequency is approximately 1 kHz.

4. A staggered-frequency inverter or amplifier in accordance with claim 2, wherein the AC signal has an rms voltage of 2600 V or less.

5. A staggered-frequency inverter or amplifier in accordance with claim 2 further comprising:

a fourth pulse width modulated bridge circuit connected in series with the first, second, and third pulse width modulated bridge circuits and configured to receive a DC voltage and to operate at a fourth pulse width modulated switch frequency substantially lower than the first, second, and third pulse width modulated switch frequencies to generate a fourth output corresponding to the AC signal in a fourth region of the AC signal in which the AC signal changes less rapidly than in the first, second, and third regions, minus a maximum voltage magnitude of the third region; and

a fifth pulse width modulated bridge circuit connected in series with the first, second, third, and fourth pulse width modulated bridge circuits and configured to receive a DC voltage and to operate at a fifth pulse width modulated switch frequency substantially lower than the first, second, third, and fourth pulse width modulated switch frequencies to generate a fifth output corresponding to the AC signal in a fifth region of the AC signal in which the AC signal changes less rapidly than in the first, second, third, and fourth regions, minus a maximum voltage magnitude of the fourth region.

6. A staggered-frequency inverter or amplifier in accordance with claim 5, wherein the AC signal has an rms voltage of 4800 V or less.

7. A staggered-frequency AC inverter or amplifier in accordance with claim 1 wherein the first region of the AC signal includes a zero crossing of the AC signal.

8. A staggered-frequency AC inverter or amplifier in accordance with claim 1 wherein the first and second pulse width modulated bridge circuits comprise full bridge circuits.

9. A staggered-frequency AC inverter or amplifier in accordance with claim 1 wherein each of the first and second pulse width modulated bridge circuits comprises a plurality of MOSFET switches.

10. A staggered-frequency AC inverter or amplifier in accordance with claim 1 wherein each of the first and second pulse width modulated bridge circuits comprises a plurality of cryogenically cooled switches.

11. A staggered-frequency AC inverter or amplifier in accordance with claim 1 wherein the first pulse width modulated bridge circuit comprises a plurality of switches arranged to operate at a first, cryogenic, temperature and the second pulse width modulated bridge circuit comprises a plurality of switches arranged to operate at a second temperature that is higher than the first, cryogenic, temperature.

12. A staggered-frequency AC inverter or amplifier in accordance with claim 11 wherein the first and second temperatures are cryogenic temperatures below about 200°

K.

13. A staggered-voltage multiple-phase circuit comprising:

a first-phase portion for generating a voltage signal in a first phase, and a second-phase portion for generating the voltage signal in a second phase out of phase with the first phase, each of the first-phase and second-phase portions comprising;

a first circuit configured to generate a first output corresponding to a plurality of segments of the voltage signal minus a corresponding plurality of constant values; and

a second circuit comprising a full-bridge switch circuit connected in series with the first circuit and configured to receive a DC voltage and to generate a second output corresponding to at least some of the plurality of constant values, such that the sum of the first output and the second output corresponds to at least a portion of the voltage signal;

control circuitry arranged to control the first and second circuits in the first-phase and second-phase portions so as to cause the first and second circuits to generate the first and second outputs respectively; and

independent and isolated power supplies connected to each first and second circuit in each of the first-phase and second-phase portions to supply DC voltage to the first and second circuits of the first-phase and second-phase portions.

14. A staggered-voltage multiple-phase circuit in accordance with claim 13, further comprising a third-phase portion for generating the voltage signal in a third phase out of phase with the first and second phases, the third-phase portion comprising:

a first circuit configured to receive a DC voltage and to generate a first output corresponding to a plurality of segments of the voltage signal minus a corresponding plurality of constant values; and

a second circuit comprising a full-bridge switch circuit connected in series with the first circuit and configured to receive a DC voltage and to generate a second output corresponding to at least some of the plurality of constant values, such that the sum of the first output and the second output corresponds to at least a portion of the voltage signal.

15. A staggered-voltage multiple-phase circuit in accordance with claim 13, wherein each of the first-phase and second-phase portions further comprises:

a third circuit comprising a full-bridge switch circuit connected in series with the first and second circuits, configured to receive a DC voltage and to generate a third output corresponding to at least some of the plurality of constant values, such that the sum of the first, second, and third outputs corresponds to at least a portion of the voltage signal.

16. A staggered-voltage multiple-phase circuit in accordance with claim 15, wherein second output includes a constant value that is approximately twice the maximum value of the first output, and the third output includes a constant value that is approximately three times the constant value that is approximately twice the maximum value of the first output.

17. A staggered-voltage multiple-phase circuit in accordance with claim 15, wherein the second and third outputs include a constant value that is approximately the same as the maximum value of the first output first, second, and third circuits produce first, second, and third outputs in a ratio of 1:

1;

1.

18. A staggered-voltage multiple-phase circuit in accordance with claim 13, wherein the first circuit comprises a pulse width modulated full-bridge switch circuit configured to receive a DC voltage and to operate at a pulse width modulated switch frequency.

19. A staggered-voltage multiple-phase circuit in accordance with claim 18, wherein the pulse width modulated switch frequency is approximately 1-1000 kHz.

20. A staggered-voltage multiple-phase circuit in accordance with claim 18, wherein the first circuit comprises a plurality of MOSFET switches.

21. A staggered-voltage multiple-phase circuit accordance with claim 20, wherein the second circuit comprises a plurality of MOSFET switches.

22. A staggered-voltage multiple-phase circuit accordance with claim 21 wherein the MOSFET switches are cryogenically cooled.

23. A staggered-voltage multiple-phase circuit in accordance with claim 20, wherein the second circuit comprises a plurality of high-voltage IGBT or GTO switches.

24. A staggered-voltage multiple-phase circuit in accordance with claim 23 wherein the IGBT or GTO switches are cryogenically cooled.

25. A staggered-voltage multiple-phase circuit in accordance with claim 13, wherein the first circuit comprises a linear class-AB amplifier.

26. A staggered-voltage multiple-phase circuit in accordance with claim 13 wherein the multiple-phase circuit is an AC inverter and the voltage signal generated by the first-phase and second-phase portions comprises a predetermined AC signal.

27. A staggered-voltage multiple-phase circuit in accordance with claim 13 wherein the multiple-phase circuit is an amplifier circuit and the voltage signal generated by the first-phase and second-phase portions comprises an amplification of an input signal.

28. A staggered-voltage multiple-phase circuit in accordance with claim 13 wherein the first circuit in the first-phase and second-phase portions comprises a plurality of switches arranged to operate at a first, cryogenic, temperature and the second circuit in the first-phase and second-phase portions comprises a plurality of switches arranged to operate at a second temperature that is higher than the first, cryogenic, temperature.

29. A staggered-voltage multiple-phase circuit in accordance with claim 28 wherein the first and second temperatures are cryogenic temperatures below about 200°

K.

30. A staggered-voltage multiple-phase circuit comprising:

a first-phase portion for generating a voltage signal in a first phase, and a second-phase portion for generating the voltage signal in a second phase out of phase with the first phase, each of the first-phase and second-phase portions comprising;

a first circuit configured to generate a first output corresponding to a plurality of segments of the voltage signal minus a corresponding plurality of constant values; and

a second circuit comprising a full-bridge switch circuit connected in series with the first circuit and configured to receive a DC voltage and to generate a second output corresponding to at least some of the plurality of constant values, such that the sum of the first output and the second output corresponds to at least a portion of the voltage signal;

control circuitry arranged to control the first and second circuits in the first-phase and second-phase portions so as to cause the first and second circuits to generate the first and second outputs respectively; and

an output transformer having first and second independent and isolated primary coils connected to respective outputs of the first-phase and second-phase portions to receive the voltage signal in the first phase generated by the first-phase portion and to receive the voltage signal in the second phase generated by the second-phase portion.

31. A staggered-frequency multiple-phase circuit comprising:

a first-phase portion for generating a voltage signal in a first phase, and a second-phase portion for generating the voltage signal in a second phase out of phase with the first phase, each of the first-phase and second-phase portions comprising;

a first pulse width modulated bridge circuit configured to receive a DC voltage and to operate at a first pulse width modulated switch frequency to generate a first output corresponding to an AC signal in a first region of the AC signal;

at least a second pulse width modulated bridge circuit connected in series with the first pulse width modulated bridge circuit and configured to receive a DC voltage and to operate at a second pulse width modulated switch frequency substantially lower than the first pulse width modulated switch frequency to generate a second output corresponding to the AC signal in a second region of the AC signal in which the AC signal changes less rapidly than in the first region, minus a maximum voltage magnitude of the first region; and

pulse width modulation circuitry arranged to modulate the first pulse width modulated bridge circuit in the first-phase and second-phase portions at the first pulse width modulated frequency to generate the first output when the AC signal is in the first region and to modulate the second pulse width modulated bridge circuit in the first-phase and second-phase portions at the second pulse width modulated frequency to generate the second output when the AC signal is in the second region different from the first region; and

independent and isolated power supplies connected to each first and second pulse width modulated bridge circuit in each of the first-phase and second-phase portions to supply DC voltage to the first and second pulse width modulated bridge circuits of the first-phase and second-phase portions.

32. A staggered-frequency multiple-phase circuit comprising:

a first-phase portion for generating a voltage signal in a first phase, and a second-phase portion for generating the voltage signal in a second phase out of phase with the first phase, each of the first-phase and second-phase portions comprising;

a first pulse width modulated bridge circuit configured to receive a DC voltage and to operate at a first pulse width modulated switch frequency to generate a first output corresponding to an AC signal in a first region of the AC signal;

at least a second pulse width modulated bridge circuit connected in series with the first pulse width modulated bridge circuit and configured to receive a DC voltage and to operate at a second pulse width modulated switch frequency substantially lower than the first pulse width modulated switch frequency to generate a second output corresponding to the AC signal in a second region of the AC signal in which the AC signal changes less rapidly than in the first region, minus a maximum voltage magnitude of the first region; and

pulse width modulation circuitry arranged to modulate the first pulse width modulated bridge circuit in the first-phase and second-phase portions at the first pulse width modulated frequency to generate the first output when the AC signal is in the first region and to modulate the second pulse width modulated bridge circuit in the first-phase and second-phase portions at the second pulse width modulated frequency to generate the second output when the AC signal is in the second region different from the first region; and

an output transformer having first and second independent and isolated primary coils connected to respective outputs of the first-phase and second-phase portions to receive the voltage signal in the first phase generated by the first-phase portion and to receive the voltage signal in the second phase generated by the second-phase portion.