Arrangement for processing packetized data

• US 5,740,460 A
• Filed: 06/07/1995
• Issued: 04/14/1998
• Est. Priority Date: 07/29/1994
• Status: Expired due to Term

• Current Assignee: Talon Research LLC
• Original Assignee: Discovision Associates (Pioneer Corporation)
• Inventors: Barnes, David Andrew, Robbins, William P., Kuligowski, Andrew Peter, Finch, Helen Rosemary, Sotheran, Martin William, Dewar, Kevin D., Jones, Anthony Mark, Smith, Colin, Barnes, Mark, Claydon, Anthony Peter John, Wise, Adrian P., Birch, Nicholas, Patterson, Donald William
• Primary Examiner(s): DAVIS JR, WALTER D
• Application Number:
  US08/481,772
• Time in Patent Office: 1,042 Days
• Field of Search: 395/375, 395/506, 395/800, 395/567, 370/389, 364/231.8, 364/261, 364/DIG. 1
• US Class Current: 348/473
• CPC Class Codes: G06F 12/0207 with multidimensional access, e.g. row/column, matrix
• CPC Class Codes: G06F 12/04 Addressing variable-length words or parts of words
• CPC Class Codes: G06F 13/16 for access to memory bus G06F13/28 takes precedence
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence
• CPC Class Codes: H04N 19/13 Adaptive entropy coding, e.g. adaptive variable length coding [AVLC] or context adaptive binary arithmetic coding [CABAC]
• CPC Class Codes: H04N 19/42 characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation H04N19/635 takes precedence
• CPC Class Codes: H04N 19/423 characterised by memory arrangements H04N19/433 takes precedence
• CPC Class Codes: H04N 19/61 in combination with predictive coding
• CPC Class Codes: H04N 19/91 Entropy coding, e.g. variable length coding [VLC] or arithmetic coding
• CPC Class Codes: H04N 21/4305 Synchronising client clock from received content stream, e.g. locking decoder clock with encoder clock, extraction of the PCR packets arrangements for synchronising receiver with transmitter by comparing receiver clock with transmitter clock H04L7/0012; arrangements for synchronising receiver with transmitter wherein the receiver takes measures against momentary loss of synchronisation H04L7/0083
• CPC Class Codes: H04N 21/43072 of multiple content streams on the same device
• CPC Class Codes: H04N 21/44004 involving video buffer management, e.g. video decoder buffer or video display buffer

Abstract

An MPEG video decompression method and apparatus utilizing a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system, including memory addressing, transforming data using a common processing block, time synchronization, asynchronous swing buffering, storing of video information, a parallel Huffman decoder, and the like.

Claims

1. A pipelined video decoder system having an input, an output and a plurality of processing stages therebetween, and receiving an input stream of encoded data comprising:

a token generator, responsive to a picture start code and to extension start code identifiers and user data in the input stream for generating a universal adaptation unit in the form of an interactive interfacing token for control and/or data functions among said processing stages, wherein said interactive interfacing token is serially transmitted through said processing stages;

wherein a discard_-- user configuration bit is included in a data packet of the input stream; and

a discard_-- extn bit is included in the data packet;

wherein responsive to a first condition of said discard extn bit the token generator disregards the extension start code identifier, and responsive to a second condition of said discard_-- extn bit the extension start code identifier is replaced with another extension data token;

whereby extension and user data are selectively specified for the user by the processing system.

2. The system according to claim 1, wherein the user data in the input stream is discarded by said token generator responsive to a condition of said discard_-- user configuration bit.

3. In a pipelined video decoder and decompression system for handling a plurality of separately encoded bit streams arranged as a single serial bit stream of digital bits and having separately encoded pairs of control codes and corresponding data carried in the serial bit stream and employing a plurality of stages interconnected by a two-wire interface, the improvement comprising:

a start code detector responsive to the single serial bit stream for generating control tokens and data tokens for application to the two-wire interface, wherein a said token comprises a plurality of data words, each data word including an extension bit which indicates a presence of additional words therein, wherein said start code detector detects overlapping start codes in said bit stream and the first start code is ignored and the second start code is used to create start code tokens; and

a token decode circuit positioned in certain of said stages for recognizing certain of said tokens as control tokens pertinent to that stage and for passing unrecognized control tokens to a succeeding stage;

wherein said two-wire interfaces each comprise;

a sender, a receiver, and a clock connected to said sender and said receiver, wherein data is transferred from said sender to said receiver upon a transition of said clock only when said sender is ready and said receiver is ready;

wherein the bit stream includes a discard_-- user configuration bit in a data packet, and the start code detector discards user data in the bit stream responsive to a condition of the discard user configuration bit;

whereby user data is selectively specified for the user by the processing system.

4. In a pipelined video decoder and decompression system for handling a plurality of separately encoded bit streams arranged as a single serial bit stream of digital bits and having separately encoded pairs of control codes and corresponding data carried in the serial bit stream and employing a plurality of stages interconnected by at least one two-wire interface, the improvement comprising:

a start code detector responsive to the single serial bit stream for generating control tokens and data tokens for application to the two-wire interface, wherein a said token comprises a plurality of data words, each data word including an extension bit which indicates a presence of additional words therein, wherein said start code detector detects overlapping start codes in said bit stream and the first start code is ignored and the second start code is used to create start code tokens and;

a token decode circuit positioned in certain of said stages for recognizing certain of said tokens as control tokens pertinent to that stage and for passing unrecognized control tokens to a succeeding stage;

wherein said two-wire interface comprises;

a sender, a receiver, and a clock connected to said sender and said receiver, wherein data is transferred from said sender to said receiver upon a transition of said clock only when said sender is ready and said receiver is ready;

wherein the bit stream includes an extension start code identifier and a discard_-- extn bit in a data packet, and responsive to a first condition of said discard_-- extn bit said start code detector disregards the extension start code identifier, and responsive to a second condition of said discard_-- extn bit the extension start code identifier is replaced with another extension data token;

whereby extension data is selectively specified for the user by the processing system.

5. In a pipeline processing machine for handling a plurality of separately encoded bit streams arranged as a single serial bit stream of digital bits and having separately encoded pairs of control codes and corresponding data carried in the serial bit stream as data packets and employing a plurality of stages interconnected by a two-wire interface, the improvement comprising:

a start code detector having first, second and third registers connected in serial fashion for receiving a portion of said serial bit stream serially therethrough, each of said registers storing a different number of bits from the bit stream;

said first register storing a value;

said second register and a first decode means for identifying a start code associated with said value contained in said first register;

circuit means for shifting said value to a predetermined end of said third register; and

a second decode means arranged for accepting data from said third register in parallel;

whereby a start code which overlaps another start code may be ignored;

a discard_-- user configuration bit in a data packet of the bit stream; and

a discard_-- extn bit in the data packet whereby extension and user data are selectively specified for the user by the processing system;

wherein said two-wire interface comprises;

a sender, a receiver, and a clock connected to said sender and said receiver, wherein data is transferred from said sender to said receiver upon a transition of said clock only when said sender is ready and said receiver is ready;

wherein responsive to a first condition of said discard_-- extn bit said start code detector disregards the extension start code identifier, and responsive to a second condition of said discard_-- extn bit the extension start code identifier is replaced with another extension data token.