Electrically alterable non-volatile memory with N-bits per cell

CAFC
  • US 5,764,571 A
  • Filed: 02/27/1995
  • Issued: 06/09/1998
  • Est. Priority Date: 02/08/1991
  • Status: Expired due to Term
First Claim
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1. A multi-level memory device comprising:

  • an electrically alterable non-volatile multi-level memory cell for storing input information in a corresponding one of Kn predetermined memory states of said multi-level memory cell, where K is a base of a predetermined number system, n is a number of bits stored per cell, and Kn >

    2;

    memory cell programming means for programming said multi-level memory cell in accordance with said input information;

    reference voltage selecting means for selecting one of a plurality of reference voltages in accordance with said input information, each of said reference voltages corresponding to a different one of said predetermined memory states; and

    comparator means for comparing a voltage of said multi-level memory cell with the selected reference voltage, said comparator means further generating a control signal indicating whether the state of said multi-level memory cell is the state corresponding to said input information.

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