Suspend/resume capability for a protected mode microprocessor

• US 5,765,004 A
• Filed: 06/01/1995
• Issued: 06/09/1998
• Est. Priority Date: 05/17/1991
• Status: Expired due to Term

• Current Assignee: Warren & Lewis Investment Corporation
• Original Assignee: Vantus Technologies, Inc.
• Inventors: Foster, Mark J., Walker, James L., Belt, Steven L., Mendelow, Matthew B., Sun, Jiming, Willoughby, Brian D., Brahman, Rodman S., Maddix, Michael D., Fakhruddin, Saifuddin T., Hovey, Scott A., Krau, Michael P., Ruthenbeck, Mark A.
• Primary Examiner(s): Kriess, Kevin A.
• Assistant Examiner(s): Chaki, Kakali
• Application Number:
  US08/457,931
• Time in Patent Office: 1,104 Days
• Field of Search: 395/750, 395/750.05, 395/750.07, 395/750.08, 395/670, 395/653
• US Class Current: 713/323
• CPC Class Codes: G06F 1/24 Resetting means
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: G06F 9/463 Program control block organisation
• CPC Class Codes: G06F 9/4812 by interrupt, e.g. masked
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A laptop computer system includes a protected mode microprocessor capable of operating in restricted and unrestricted modes, and an arrangement which in response to a predetermined condition saves information from the processor and then forcibly switches the processor to its unrestricted mode of operation. When running a multi-tasking operating system where an application program is being executed in a restricted mode, a suspend/resume operation can be carried out in which the system is substantially powered down and then powered back up, and will resume the interrupted application with the restricted mode back in effect. Further, set-up changes such as adjustment of the processor speed can be made without exiting the application program running in the restricted mode.

Claims

1. An apparatus, comprising:

a main processor having a normal operational mode, a first reduced power mode, and a second reduced power mode different from said first reduced power mode;

an auxiliary processor operationally coupled to said main processor;

a modem adapted to be coupled to a telephone line, having an output, and having means for producing a ring signal at said output in response to an incoming telephone call on the telephone line;

means responsive to a first predetermined condition for switching said main processor to said first reduced power mode and responsive to a second predetermined condition for switching said main processor to said second reduced power mode;

means for causing said auxiliary processor to monitor said output of said modem when said main processor is in said first reduced power mode and to switch said main processor from said first reduced power mode to said normal operational mode in response to an occurrence of said ring signal at said output of said modem; and

means for causing said main processor to monitor said output of said modem when said main processor is in said second reduced power mode and to switch from said second operational mode to said normal operational mode in response to an occurrence of said ring signal at said output of said modem.

2. An apparatus according to claim 1, wherein said main processor consumes less power in said first reduced power mode than in said normal operational mode, and consumes less power in said second reduced power mode than in said first reduced power mode.

3. An apparatus according to claim 1, wherein said main processor carries out program execution in said normal operational mode and is halted in each of said first and second reduced power modes, and wherein said auxiliary processor carries out program execution when said main processor is in either of said normal operational mode and said first reduced power mode, and is halted when said main processor is in said second reduced power mode.

4. An apparatus according to claim 3, including means for facilitating control by said main processor of power to said auxiliary processor, and means for causing said main processor to turn off power to said auxiliary processor as said main processor is entering said second reduced power mode, and for causing said main processor to turn on power to said auxiliary processor when said main processor is exiting said second reduced power mode.

5. An apparatus, comprising:

a main processor having a normal operational mode, a first reduced power mode, and a second reduced power mode different from said first reduced power mode;

an auxiliary processor operationally coupled to said main processor;

means responsive to a first predetermined condition for switching said main processor to said first reduced power mode and responsive to a second predetermined condition for switching said main processor to said second reduced power mode;

means for causing said auxiliary processor to monitor for the occurrence of a third predetermined condition when said main processor is in said first reduced power mode and to switch said main processor from said first reduced power mode to said normal operational mode in response to an occurrence of said third predetermined condition; and

means for causing said main processor to monitor for said third predetermined condition when said main processor is in said second reduced power mode and to switch from said second operational mode to said normal operational mode in response to an occurrence of said third predetermined condition.

6. An apparatus according to claim 5, including a device having an output and means for selectively generating a signal at said output, said generation of said signal being said third predetermined condition, said auxiliary processor and said main processor each detecting said third predetermined condition by sensing generation of said signal on said output.

7. An apparatus according to claim 5, wherein said main processor consumes less power in said first reduced power mode than in said normal operational mode, and consumes less power in said second reduced power mode than in said first reduced power mode.

8. An apparatus according to claim 5, wherein said main processor carries out program execution in said normal operational mode and is halted in each of said first and second reduced power modes, and wherein said auxiliary processor carries out program execution when said main processor is in either of said normal operational mode and said first reduced power mode, and is halted when said main processor is in said second reduced power mode.

9. An apparatus according to claim 8, including means for facilitating control by said main processor of power to said auxiliary processor, and means for causing said main processor to turn off power to said auxiliary processor as said main processor is entering said second reduced power mode, and for causing said main processor to turn on power to said auxiliary processor when said main processor is exiting said second reduced power mode.