Semiconductor integrated circuit having an SOI structure, provided with a protective circuit

• US 5,786,616 A
• Filed: 09/10/1997
• Issued: 07/28/1998
• Est. Priority Date: 09/19/1994
• Status: Expired due to Fees

• Current Assignee: Nippondenso Co., Ltd. (DENSO Corporation)
• Original Assignee: Nippondenso Co., Ltd. (DENSO Corporation)
• Inventors: Tanaka, Hiroaki, Asai, Akiyoshi, Fukumoto, Harutsugu
• Primary Examiner(s): Hardy, David B.
• Application Number:
  US08/926,997
• Time in Patent Office: 321 Days
• Field of Search: 257/379, 257/350, 257/357, 257/358, 257/359, 257/360, 257/347, 257/355
• US Class Current: 257/358
• CPC Class Codes: H01L 27/0251 for MOS devices
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688

Abstract

A SOI semiconductor integrate circuit device, which can protect against surges between a signal-input terminal and power-supply input terminal thereof to obtain an improved electrostatic withstand quantity, is disclosed. An inverter circuit which is an integrated circuit is formed in a thin-film semiconductor layer formed through an insulation film on a p-type silicon substrate. An n-type diode diffusion region, resistor diffusion region, and FET diffusion region are formed within the silicon substrate. An input portion of the inverter circuit is connected through the resistor diffusion region to a signal-input terminal IN. A power-supply input terminal VC is connected to a ground terminal GND through a reverse-biased diode D formed by the diode diffusion region. When surge is applied to the signal-input terminal IN, a parasitic diode DD composed by the resistor diffusion region and silicon substrate exhibits avalanche breakdown and surge voltage is bypassed. An electrostatic withstand quantity of the inverter circuit can be increased.

Claims

1. A semiconductor integrated circuit device comprising:

an integrated circuit formed in a thin-film semiconductor layer disposed on a semiconductor substrate of a first conductivity type with an insulation film interposed therebetween, said semiconductor integrated circuit device being provided with a signal-input terminal, maximum-potential terminal, and minimum-potential terminal;

a resistor diffusion region of a second conductivity type formed within said semiconductor substrate so as to be electrically connected between a signal-input portion of said integrated circuit and said signal-input terminal;

a diode diffusion region of said second conductivity type formed within said semiconductor substrate adjacent to said resistor diffusion region and connected to one of said maximum-potential terminal and said minimum-potential terminal;

a contact diffusion region of said first conductivity type formed within said semiconductor substrate and connected to another of said maximum-potential terminal and said minimum-potential terminal, whereby said diode diffusion region reverse-biases between said maximum-potential terminal and minimum-potential terminal;

a FET diffusion region of said second conductivity type formed within said semiconductor substrate; and

a a gate electrode formed on said semiconductor substrate with an insulation film interposed therebetween so as to be located over a surface between said FET diffusion region and said resistor diffusion region,

wherein a MOSFET for input-protection use is formed between said signal-input terminal and said other potential terminal by electrically connecting said resistor diffusion region and said gate electrode to said signal-input terminal and by causing said FET diffusion region to be equipotential with said contact diffusion region.

2. A semiconductor integrated circuit device comprising:

a semiconductor substrate of a first conductivity type;

a thin-film semiconductor layer formed on said semiconductor substrate with an insulation film interposed therebetween;

an integrated circuit formed in said thin-film semiconductor layer and having a power-supply electrode established at a power supply potential, a ground electrode electrically connected to said semiconductor substrate and established at a ground potential, and a signal-input electrode established at a potential between said power-supply potential and said ground potential;

a first diffusion layer composed of a diffusion layer of a second conductivity type formed within said semiconductor substrate and electrically connected to said power supply electrode, adjacent portions of said first diffusion layer and said semiconductor substrate together defining a first PN junction; and

a second diffusion layer composed of a diffusion layer of the second conductivity type formed within said semiconductor substrate and electrically connected to said signal-input electrode, adjacent portions of said second diffusion layer and said semiconductor substrate together defining a second PN junction,

wherein voltage surges between said power-supply electrode and said ground electrode are absorbed by said first PN junction between said first diffusion layer and said semiconductor substrate, voltage surges between said signal-input electrode and said ground electrode are absorbed by said second PN junction between said second diffusion layer and said semiconductor substrate, and voltage surges between said power-supply electrode and said signal-input electrode are absorbed by causing avalanche breakdown at either of said first and second PN junctions.

3. A semiconductor integrated circuit device according to claim 2, wherein said first diffusion layer and said second diffusion layer are formed adjacently within said semiconductor substrate.

4. A semiconductor integrated circuit device according to claim 2, further comprising:

first and second contact holes formed in said insulation film through which said semiconductor substrate and said thin-film semiconductor layer communicate, said first diffusion layer and said second diffusion layer being respectively connected via said first and second contact holes to said power-supply electrode and said signal-input electrode.

5. A semiconductor integrated circuit device comprising:

a semiconductor substrate of a first conductivity type;

a thin-film semiconductor layer formed on said semiconductor substrate with an insulation film interposed therebetween;

an integrated circuit formed in said thin-film semiconductor layer and having a ground electrode electrically connected to said semiconductor substrate and established at ground potential, a power-supply terminal established at power-supply voltage, and a signal-input portion electrically connected to a signal-input terminal to input signals from an external portion;

a first diffusion layer composed of a diffusion layer of a second conductivity type formed within said semiconductor substrate and electrically connected to said power-supply terminal adjacent portions of said first diffusion layer and said semiconductor substrate together defining a first PN junction; and

a second diffusion layer composed of a diffusion layer of the second conductivity type formed within said semiconductor substrate and electrically connected between said signal-input terminal and said signal-input portion adjacent portions of said second diffusion layer and said semiconductor substrate together defining a second PN junction,

wherein voltage surges between said power-supply terminal and said signal-input terminal are absorbed by causing avalanche breakdown at either of said first PN function between said first diffusion layer and said semiconductor substrate or said second PN junction between said second diffusion layer and said semiconductor substrate voltage surges between said power-supply terminal and said ground electrode are absorbed by said first PN junction and voltage surges between said signal-input terminal and said ground electrode are absorbed by said second PN junction.

6. A semiconductor integrated circuit device according to claim 5, wherein said first diffusion layer and said second diffusion layer are formed adjacently within said semiconductor substrate.

7. A semiconductor integrated circuit device according to claim 5, wherein said signal-input terminal is electrically connected through said second diffusion layer to said signal-input portion.

8. A semiconductor integrated circuit device according to claim 5, further comprising:

a third diffusion layer within said semiconductor substrate composed of a diffusion layer of the second conductivity type formed adjacently to said second diffusion layer and electrically connected to said ground electrode; and

a gate electrode formed within said thin-film semiconductor layer with said insulation film interposed between said semiconductor substrate and said gate electrode, said gate electrode being electrically connected to said signal-input terminal so as to form a channel between said second diffusion layer and said third diffusion layer,

wherein surge voltage input between said ground electrode and said signal-input terminal is absorbed by causing a transistor formed by said second diffusion layer, said third diffusion layer and said gate electrode to become conductive.

9. A semiconductor integrated circuit device according to claim 5, further comprising a third diffusion layer composed of a diffusion layer of the second conductivity type formed within said semiconductor substrate and electrically connected to said ground electrode;

wherein surge voltage input between said ground electrode and said power-supply terminal is absorbed by causing avalanche breakdown at either pn diode of a pn diode between said third diffusion layer and said semiconductor substrate or a pn diode between said first diffusion layer and said semiconductor substrate.

10. A semiconductor integrated circuit device according to claim 5, further comprising:

a fourth diffusion layer composed of a diffusion layer of the first conductivity type formed within said semiconductor substrate and electrically connected to said ground electrode and, along with this, establishing potential of said semiconductor substrate at ground potential.

11. A semiconductor integrated circuit device comprising:

a semiconductor substrate of a first conductivity type;

a thin-film semiconductor layer formed on said semiconductor substrate with an insulation film interposed therebetween;

an integrated circuit having a ground electrode established at ground potential, a power-supply terminal established at power-supply voltage, and a signal-input portion electrically connected to a signal-input terminal to input signals from an external portion, said integrated circuit being formed in said thin-film semiconductor layer;

a first diffusion layer composed of a diffusion layer of a second conductivity type formed within said semiconductor substrate and electrically connected to said power-supply terminal through a first contact hole formed in said insulation film, adjacent portions of said first diffusion layer and said semiconductor substrate together defining a first PN junction; and

a second diffusion layer composed of a diffusion layer of the second conductivity type formed within said semiconductor substrate and electrically connected between said signal-input terminal and said signal-input portion through a second contact hole formed in said insulation film, adjacent portions of said second diffusion layer and said semiconductor substrate together defining a second PN junction,

wherein voltage surges between said power-supply terminal and said signal-input terminal are absorbed by causing avalanche breakdown at either of said first PN junction between said first diffusion layer and said semiconductor substrate or said second PN junction between said second diffusion layer and said semiconductor substrate, voltage surges between said power-supply terminal and said ground electrode are absorbed by said first PN junction and voltage surges between said signal-input terminal and said ground electrode are absorbed by said second PN junction.

12. A semiconductor integrated circuit device comprising:

a semiconductor substrate of a first conductivity type;

a thin-film semiconductor layer formed on said semiconductor substrate with an insulation film interposed therebetween;

an integrated circuit formed in said thin-film semiconductor layer and having a power-supply electrode established at a power-supply potential, a ground electrode established at a ground potential, and a signal-input electrode established at a potential between said power-supply potential and said ground potential;

a first diffusion layer composed of a diffusion layer of a second conductivity type formed within said semiconductor substrate and electrically connected to said power supply electrode, adjacent portions of said first diffusion layer and said semiconductor substrate together defining a first PN junction;

a second diffusion layer composed of a diffusion layer of a second conductivity type formed within said semiconductor substrate and electrically connected to said signal-input electrode, adjacent portions of said second diffusion layer and said semiconductor substrate together defining a second PN junction; and

a third diffusion layer composed of a diffusion layer of the first conductivity type formed within said semiconductor substrate and electrically connected to said ground electrode so that said third diffusion layer establishes potential of said semiconductor substrate,

wherein voltage surges between said power-supply electrode and said signal-input electrode are absorbed by causing breakdown at either of said first PN junction between said first diffusion layer and said semiconductor substrate or said second PN junction between said second diffusion layer and said semiconductor substrate, voltage surges between said power-supply electrode and said ground electrode are absorbed by said first PN junction, and voltage surges between said signal-input electrode and said ground electrode are absorbed by said second PN junction.

13. A semiconductor integrated circuit device comprising:

a semiconductor substrate of a first conductivity type;

a semiconductor layer disposed on said semiconductor substrate with an insulation film interposed therebetween;

an integrated circuit having a semiconductor element formed in said semiconductor layer;

a ground terminal for supplying a ground potential to said integrated circuit and electrically connected to said semiconductor substrate;

a power-supply terminal for supplying a power-supply voltage to said integrated circuit;

a signal terminal for communicating an electric signal between an external portion and said integrated circuit;

a first protective circuit composed of a first layer of a second conductivity type disposed within said semiconductor substrate and electrically connected to said signal terminal, adjacent portions of said first layer and said semiconductor substrate together defining a first PN junction, said first protective circuit protecting said integrated circuit from voltage surges between said signal terminal and said ground terminal by absorbing the voltage surges at said first PN junction; and

a second protective circuit composed of a second layer of a second conductivity type disposed within said semiconductor substrate and electrically connected to said power-supply terminal, adjacent portions of said second layer and said semiconductor substrate together defining a second PN junction, said second protective circuit protecting said integrated circuit from voltage surges between said power-supply terminal and said ground terminal by absorbing the voltage surges at said second PN junction,

wherein voltage surges between said power-supply terminal and said signal terminal are absorbed by both said first and second PN junctions.

14. A semiconductor integrated circuit device according to claim 13, wherein said first layer and said second layer are disposed adjacently within said semiconductor substrate.

15. A semiconductor integrated circuit device according to claim 13, wherein said second protective circuit includes a diode structure.

16. A semiconductor integrated circuit device according to claim 13, wherein said second layer is disposed in said semiconductor substrate and formed so as to exhibit electrical conduction by causing a breakdown at said second PN junction when the voltage surges are applied to said power-supply terminal.

17. A semiconductor integrated circuit device comprising:

an integrated circuit formed in a thin-film semiconductor layer disposed on a semiconductor substrate with an insulation film interposed therebetween and having a first withstand voltage, said integrated circuit being provided with a signal-input terminal, a maximum-potential terminal and a minimum-potential terminal, a signal voltage less than a value of said first withstand voltage being applied between said signal-input terminal and said maximum-potential terminal and between said signal-input terminal and said minimum-potential terminal;

a first protective element provided between said signal-input terminal and said minimum-potential terminal and including a first PN junction having a second withstand voltage which is greater than said signal voltage and less than said first withstand voltage, wherein voltage surges greater than said second withstand voltage between said signal-input terminal and said minimum-potential terminal are absorbed by said first protective element which becomes conductive in response thereto; and

a second protective element provided between said maximum-potential terminal and said minimum-potential terminal and including a second PN junction having a third withstand voltage which is greater than said signal voltage and less than said first withstand voltage, wherein voltage surges greater than said third withstand voltage between said maximum-potential terminal and said minimum-potential terminal are absorbed by said second protective element which becomes conductive in response thereto,

wherein said second protective element is electrically connected to said first protective element through said minimum-potential terminal, and one of said first and second PN junctions is connected in a forward direction and the other is connected in a reverse direction between said signal-input terminal and said maximum-potential terminal.

18. A semiconductor integrated circuit device according to claim 17, wherein said first protective element and said second protective element are disposed within said semiconductor substrate.

19. A semiconductor integrated circuit device according to claim 17, further comprising:

a potential establishing diffusion layer of a same conductivity type as said semiconductor substrate, formed within said semiconductor substrate and electrically connected to said minimum-potential terminal to establish a potential of said semiconductor substrate;

a first diffusion layer of an opposite conductivity type to said semiconductor substrate, formed within said semiconductor substrate and electrically connected to said signal-input terminal, adjacent portions of said first diffusion layer and said semiconductor substrate together defining said first PN junction in said first protective element; and

a second diffusion layer of the opposite conductivity type to said semiconductor substrate, formed within said semiconductor substrate and electrically connected to said maximum-potential terminal, adjacent portions of said second diffusion layer and said semiconductor substrate together defining said second PN junction in said second protective element.

20. A semiconductor integrated circuit device according to claim 19, wherein said first diffusion layer and said second diffusion layer are formed in adjacent positions.

21. A semiconductor integrated circuit device according to claim 20, further comprising:

a FET diffusion layer of the opposite conductivity type to said semiconductor substrate, formed within said semiconductor substrate; and

a gate electrode formed on said semiconductor substrate with an insulation film interposed therebetween so as to be located over a surface between said FET diffusion layer and said first diffusion layer,

wherein a MOSFET for input-protection use is formed between said signal-input terminal and said minimum-potential terminal by electrically connecting said first diffusion layer and said gate electrode to said signal-input terminal and by causing said FET diffusion layer to be equipotential with said potential establishing diffusion layer.

22. A semiconductor integrated circuit device comprising:

an integrated circuit formed in a thin-film semiconductor layer disposed on a semiconductor substrate with an insulation film interposed therebetween and having a withstand voltage, said integrated circuit being provided with a signal-input terminal, maximum-potential terminal and minimum-potential terminal, a signal voltage less than a value of said withstand voltage being applied between said signal-input terminal and said maximum-potential terminal and between said signal-input terminal and said minimum-potential terminal;

a first protective element provided between said signal-input terminal and minimum-potential terminal, said first protective element having a first threshold voltage which is larger than said signal voltage and is less than said withstand voltage, wherein current caused by voltage surges greater than said first threshold voltage between said signal-input terminal and minimum-potential terminal flows through said first protective element which becomes conductive in response to the voltage surges; and

a second protective element provided between said maximum-potential terminal and minimum-potential terminal, said second protective element having a second threshold voltage which is greater than said signal voltage and less than said withstand voltage, wherein current caused by voltage surges greater than said second threshold voltage between said maximum-potential terminal and minimum-potential terminal flows through said second protective element which becomes conductive in response to the voltage surges, wherein said second protective element is electrically connected to said first protective element through said minimum-potential terminal.

23. A semiconductor integrated circuit device according to claim 22, wherein said first protective element and said second protective element are disposed within said semiconductor substrate.

24. A semiconductor integrated circuit device according to claim 22, further comprising:

a potential establishing diffusion layer of a same conductivity type as said semiconductor substrate, formed within said semiconductor substrate and electrically connected to said minimum-potential terminal to establish a potential of said semiconductor substrate;

a first diffusion layer of an opposite conductivity type to said semiconductor substrate, formed within said semiconductor substrate and electrically connected to said signal-input terminal, adjacent portions of said first diffusion layer and said semiconductor substrate together forming a PN junction in said first protective element; and

a second diffusion layer of the opposite conductivity type to said semiconductor substrate, formed within said semiconductor substrate and electrically connected to said maximum-potential terminal, adjacent portions of said second diffusion layer and said semiconductor substrate together forming a PN junction in said second protective element.

25. A semiconductor integrated circuit device according to claim 24, wherein said first diffusion layer and said second diffusion layer are formed in adjacent positions.

26. A semiconductor integrated circuit device according to claim 25, further comprising:

a FET diffusion layer of the opposite conductivity type to said semiconductor substrate, formed within said semiconductor substrate; and

a gate electrode formed on said semiconductor substrate with an insulation film interposed therebetween so as to be located over a surface between said FET diffusion layer and said first diffusion layer,

wherein a MOSFET for input-protection use is formed between said signal-input terminal and said minimum-potential terminal by electrically connecting said first diffusion layer and said gate electrode to said signal-input terminal and by causing said FET diffusion layer to be equipotential with said potential establishing diffusion layer.

27. A semiconductor integrated circuit device comprising:

a semiconductor substrate of a first conductivity type;

a thin-film semiconductor layer formed on said semiconductor substrate with an insulation film interposed therebetween;

an integrated circuit formed in said thin-film semiconductor layer and having a power-supply electrode established at a power-supply potential, a ground electrode established at a ground potential, and a signal-input electrode established at a potential between said power-supply potential and said ground potential;

a first diffusion layer composed of a diffusion layer of a second conductivity type formed within said semiconductor substrate and electrically connected to said power supply electrode, adjacent portions of said first diffusion layer and said semiconductor substrate together defining a first PN junction, said first PN junction forming a first protective element;

a second diffusion layer composed of a diffusion layer of a second conductivity type formed within said semiconductor substrate and electrically connected to said signal-input electrode, adjacent portions of said second diffusion layer and said semiconductor substrate together defining a second PN junction, said second PN junction forming a second protective element; and

a third diffusion layer composed of a diffusion layer of the first conductivity type formed within said semiconductor substrate and electrically connected to said ground electrode so that said third diffusion layer establishes potential of said semiconductor substrate,

wherein current caused by voltage surges between said power-supply electrode and said signal-input electrode flows through either of said first protective element or said second protective element, current caused by voltage surges between said power-supply electrode and said ground electrode flows through said first protective element, and current caused by voltage surges between said signal-input electrode and said ground electrode flows through said second protective element.

28. A semiconductor integrated circuit device comprising:

a semiconductor substrate;

a semiconductor layer disposed on said semiconductor substrate with an insulation film interposed therebetween;

an integrated circuit having a semiconductor element formed in said semiconductor layer;

a ground terminal for supplying a ground potential to said integrated circuit and electrically connected to said semiconductor substrate;

a power-supply terminal for supplying a power-supply voltage to said integrated circuit;

a signal terminal for communicating an electric signal between an external portion and said integrated circuit;

a first protective circuit electrically connected between said signal terminal and said ground terminal, said first protective circuit becoming conductive in response to occurrence of voltage surges between said signal terminal and said ground terminal to caused current due to the voltage surges to flow therethrough; and

a second protective circuit electrically connected between said power-supply terminal and said ground terminal, said second protective circuit becoming conductive in response to occurrence of voltage surges between said power-supply terminal and said ground terminal to cause current due to the voltage surges to flow therethrough,

wherein current due to voltage surges between said power-supply terminal and said signal terminal flows through both said first protective circuit and said second protective circuit.

29. A semiconductor integrated circuit device according to claim 28, wherein said first protective circuit is composed of a first layer of an opposite conductivity type to said semiconductor substrate and disposed within said semiconductor substrate, adjacent portions of said first layer and said semiconductor substrate together defining a first PN junction which becomes conductive in response to the voltage surges between said signal terminal and said ground terminal, and said second protective circuit is composed of a second layer of an opposite conductivity type to said semiconductor substrate and disposed within said semiconductor substrate, adjacent portions of said second layer and said semiconductor substrate together defining a second PN junction which becomes conductive in response to the voltage surges between said power supply terminal and said ground terminal.

30. A semiconductor integrated circuit device according to claim 29, wherein said first layer and said second layer are disposed adjacently within said semiconductor substrate.

31. A semiconductor integrated circuit device according to claim 29, wherein said second protective circuit includes a diode structure.

32. A semiconductor integrated circuit device comprising:

a semiconductor substrate of a first conductivity type;

a thin-film semiconductor layer formed on said semiconductor substrate with an insulation film interposed therebetween;

an integrated circuit formed in said thin-film semiconductor layer and having a power-supply electrode established at a power supply potential, a ground electrode electrically connected to said semiconductor substrate and established at a ground potential, and a signalinput electrode established at a potential between said power-supply potential and said ground potential;

a first diffusion layer composed of a diffusion layer of a second conductivity type formed within said semiconductor substrate and electrically connected to said power supply electrode, adjacent portions of said first diffusion layer and said semiconductor substrate together defining a first PN junction; and

a second diffusion layer composed of a diffusion layer of the second conductivity type formed within said semiconductor substrate and electrically connected to said signal-input electrode, adjacent portions of said second diffusion layer and said semiconductor substrate defining a second PN junction,

wherein voltage surges between said power-supply electrode and said ground electrode are released via said first PN junction, voltage surges between said signal-input electrode and said ground electrode are released via said second PN junction, and voltage surges between said power-supply electrode and said signal-input electrode are released via either of said first and second PN junctions.

34. A semiconductor integrated circuit device according to claim 32, further comprising:

first and second contact holes formed in said insulation film through which said semiconductor substrate and said thin-film semiconductor layer communicate, said first diffusion layer and said second diffusion layer being respectively connected via said first and second contact holes to said power-supply electrode and said signal-input electrode.

35. A semiconductor integrated circuit device according to claim 32, wherein said signal input electrode is electrically connected through said second diffusion layer to a signalinput portion of said integrated circuit.

36. A semiconductor integrated circuit device according to claim 32, further comprising:

a third diffusion layer of the second conductivity type, formed adjacently to said second diffusion layer within said semiconductor substrate and electrically connected to said ground electrode; and

a gate electrode formed within said thin-film semiconductor layer with said insulation film interposed between said semiconductor substrate and said gate electrode, said gate electrode being electrically connected to said signal-input electrode so as to form a channel between said second diffusion layer and said third diffusion layer,

wherein voltage surges between said ground electrode and said signal input electrode are released by causing a transistor formed by said second diffusion layer, said third diffusion layer and said gate electrode to become conductive.

37. A semiconductor integrated circuit device according to claim 32, further comprising:

a third diffusion layer of the second conductivity type, formed within said semiconductor substrate and electrically connected to said ground electrode,

wherein voltage surges between said ground electrode and said power-supply electrode are released by causing avalanche breakdown at either of a PN diode between said third diffusion layer and said semiconductor substrate and a PN diode between said first diffusion layer and said semiconductor substrate.

38. A semiconductor integrated circuit device according to claim 32, further comprising:

a fourth diffusion layer composed of a diffusion layer of the first conductivity type formed within said semiconductor substrate and electrically connected to said ground electrode and establishing potential of said semiconductor substrate at ground potential.

33. A semiconductor integrated circuit device according to clam 32, wherein said first diffusion layer and second diffusion layer are formed adjacently within said semiconductor substrate.