Method and system for in-site and on-line reprogramming of hardware logics with remote loading in a network device

• US 5,794,033 A
• Filed: 10/24/1995
• Issued: 08/11/1998
• Est. Priority Date: 10/24/1995
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Aldebert, Jeane-Paul, Chemla, Paul, Basso, Claude, Verplanken, Fabrice, Calvignac, Jean, Orsatti, Daniel, Zunino, Jean-Claude
• Primary Examiner(s): Chan, Eddie P.
• Assistant Examiner(s): KIM, HONG CHONG
• Application Number:
  US08/547,635
• Time in Patent Office: 1,022 Days
• Field of Search: 326/38, 326/39, 326/8, 365/185.22, 365/185.33, 365/189.08, 711/103, 340/825.83, 364/716.03, 395/598, 395/821, 395/651, 395/653
• US Class Current: 713/100
• CPC Class Codes: G06F 13/4256 using a clocked protocol

Abstract

The invention discloses a method and an apparatus for in-line and on-site updating of Field Programmable Gate Arrays with remote loaded configuration data files. Flash EEPROMs which are used because of their non-volatile memories and their high density, are storing more than one configuration data file. The memories are divided in more than one part, each part of the memory for storing one configuration data file. One part of the memory also contains a flag identifying the currently loaded configuration data file. The Flash EPROM'"'"'s bits being set to one same binary value before any writing operation, including the update of the configuration data file containing the flag. The setting of the bits to said binary value always identifies a valid other configuration data file in order to insure a correct re-loading of the FPGAs in case of reception of an unexpected event leading to an initialization.

Claims

1. A method of updating configuration information in a programmable hardware logic device during operation of said logic device, said logic device having means for receiving first data and means for sending second data under control of a local or remote control means, said method comprising the steps of:

using an external non-volatile memory, said memory organized into a plurality of parts, each of said parts comprising one or more sections, each of said sections comprising a plurality of bits, and wherein modification of any of said bits in a selected section requires flushing all of said plurality of bits in said selected section to a same binary value;

storing a plurality of configuration data files in said memory, wherein one of said configuration data files is characterized as a safe configuration data file;

using an external device for controlling said memory and for transferring data between said memory and said logic device;

storing a flag in one of said parts of said memory, wherein said flag is comprised of one or more of said plurality of bits and identifies one of said plurality of configuration data files;

initializing said memory to store said safe configuration data file;

initializing said flag to identify said safe configuration data file;

receiving from said control means a demand for loading, and in response to said demand, using said flag to locate one of said plurality of configuration data files and sending said located configuration data file to said logic device;

receiving said located configuration data file in said logic device under control of said control means;

updating said configuration information after receiving said located configuration data file;

selectively modifying said flag to identify said new configuration data file as said safe configuration data file after said new configuration data file has been safely loaded;

sending a new configuration data file from said logic device to said external device under control of said control means; and

receiving said new file from said logic device, and storing said new file as one of said plurality of configuration data files in one of said parts, wherein said one part is different from the part in which said safe configuration data file is stored.

2. The method of claim 1, wherein said memory is further characterized by having a plurality of addressable locations, said method further comprising the steps of:

sending a demand from said logic device to said external device under control of said control means, wherein said demand may be a first demand for reading or a second demand for writing;

sending an address from said logic device to said external device under control of said control means, wherein said address may be a first address or a second address;

sending first data from said logic device to said external device under control of said control means;

receiving second data in said logic device under control of said control means, wherein said second data may be operating data or any of said configuration data files;

receiving said first demand for reading;

receiving said first address from said logic device after receiving said first demand, and in response, retrieving said second data from said first address and sending said second data to said logic device, wherein said first address identifies one of said plurality of addressable locations;

receiving said second demand for writing;

receiving said second address from said logic device after receiving said second demand; and

receiving said first data after receiving said second address, and in response, storing said first data at said second address, wherein said second address identifies one of said plurality of addressable locations.

3. The method of claim 1 or 2, wherein said flag identifies said safe configuration data file when all of said one or more bits is set to said same binary value.

4. The method of claim 1 or 2, wherein said memory is organized into two parts, each of said parts containing a single configuration data file, wherein said flag comprises a single bit in one of said sections of a first of said two parts, and when said flag is set to said binary value, said flag identifies the configuration data file in a second of said two parts.

5. The method of claim 1 or 2, further comprising the step of storing non-configuration data in said memory.

6. The method of claim 4, wherein said flag, when set to said binary value, identifies said safe configuration data file.

7. The method of claim 2, wherein said flag is stored at one of said plurality of addressable locations, and when said flag is to be sent or received by said external device, said first address or said second address, respectively, identifies said location at which said flag is stored.

8. The method of claim 7, wherein said flag, when set to said binary value, identifies said safe configuration data file.

9. The method of claim 5, wherein said flag, when set to said binary value, identifies said safe configuration data file.

10. A system for updating configuration information in a programmable hardware logic device during operation of said logic device, comprising:

an external non-volatile memory, said memory organized into a plurality of parts, each of said parts comprising one or more sections, each of said sections comprising a plurality of bits, and wherein modification of any of said bits in a selected section requires flushing all of said plurality of bits in said selected section to a same binary value;

a plurality of configuration data files stored in said memory, wherein one of said configuration data files is characterized as a safe configuration data file;

an external device for controlling said memory and for transferring data between said memory and said logic device;

a flag stored in one of said parts of said memory, wherein said flag is comprised of one or more of said plurality of bits and identifies one of said plurality of configuration data files;

means in said external device for receiving a demand for loading from a local or remote control means, and in response to said demand, using said flag to locate one of said plurality of configuration data files and sending said located configuration data file to said logic device;

means in said logic device for receiving said located configuration data file under control of said control means;

means in said logic device for updating said configuration information after receiving said located configuration data file;

means in said logic device for sending a new configuration data file to said external device under control of said control means;

means in said external device for receiving said new file from said logic device, and storing said new file as one of said plurality of configuration data files in one of said parts, wherein said one part is different from the part in which said safe configuration data file is stored;

means for initializing said memory to store said safe configuration data file;

means for initializing said flag to identify said safe configuration data file; and

means for selectively modifying said flag to identify said new configuration data file as said safe configuration data file.

11. The system of claim 10, wherein said memory is further characterized by having a plurality of addressable locations, said system further comprising:

means in said logic device for sending a demand to said external device under control of said control means, wherein said demand may be a first demand for reading or a second demand for writing;

means in said logic device for sending an address to said external device under control of said control means, wherein said address may be a first address or a second address;

means in said logic device for sending first data to said external device under control of said control means;

means in said logic device for receiving second data from said external device under control of said control means, wherein said second data may be operating data or any of said configuration data files;

means in said external device for receiving said first demand for reading;

means for receiving said first address from said logic device after receiving said first demand, and in response, retrieving said second data from said first address and sending said second data to said logic device, wherein said first address identifies one of said plurality of addressable locations;

means in said external device for receiving said second demand for writing;

means for receiving said second address from said logic device after receiving said second demand; and

means for receiving said first data after receiving said second address, and in response, storing said first data at said second address, wherein said second address identifies one of said plurality of addressable locations.

12. The system of claim 10 or 11, wherein said flag identifies said safe configuration data file when all of said one or more bits is set to said same binary value.

13. The system of claim 10 wherein said logic device is characterized as a lead logic device, said system further comprising:

at least one slave programmable hardware logic device, wherein all of said slave logic devices are connected in serial mode and a first of said at least one slave logic devices is connected to said lead logic device in serial mode; and

means for propagating said located configuration data file in serial mode from said lead logic device to said first slave logic device, and from said first slave logic device to any other of said connected slave logic devices beyond said first slave logic device.