Sound board emulation using digital signal processor using data word to determine which operation to perform and writing the result into read communication area

• US 5,797,029 A
• Filed: 01/22/1997
• Issued: 08/18/1998
• Est. Priority Date: 03/30/1994
• Status: Expired due to Term

• Current Assignee: Sigma Designs Incorporated
• Original Assignee: Sigma Designs Incorporated
• Inventors: Nguyen, Julien T., Hsu, Mark, Le Cornec, Yann
• Primary Examiner(s): Meky, Moustafa A.
• Application Number:
  US08/786,295
• Time in Patent Office: 573 Days
• Field of Search: 395/821, 395/822, 395/825, 395/2.1, 395/2.09, 395/281, 395/283, 395/282, 395/500, 395/842, 395/853, 395/868
• US Class Current: 710/5
• CPC Class Codes: G06F 13/105 where the programme performs an input/output emulation function
• CPC Class Codes: G06F 3/16 Sound input; Sound output speech processing G10L
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

An improved audio-output device coupleable to a computer system, in which a DSP operating under software control emulates a common command interface. The command interface has a set of registers that are made available to the CPU for reading and writing, even if there are no such physical registers available in the device. The DSP also performs tasks in addition to audio-output, even though the audio-output device is required to respond immediately to commands from the CPU. The audio-output device has a DSP for interpreting and executing commands received from the CPU, a local memory for storing data input to or output from the DSP, a bus-interface (BIF) element for coupling the DSP and memory to a system bus, and a direct memory access (DMA) element for transferring data between the local memory and the system bus. The local memory has an emulation region for emulating a set of named registers the CPU may read from and write into according to the command interface, and a communication region for transmitting messages between the CPU and the DSP. The emulation region is indicated by a base register and a set of offset values, and has a dynamically allocated set of registers for emulating the set of named registers the CPU may read from and write into.

Claims

1. A method for emulating a sound board, the method comprising the steps of:

receiving a command from a device;

performing a write operation into an addressable space within a write communication area when said command indicates that data should be written into a designated register, said step of performing a write operation further including a step of mapping said designated register to said addressable space within said write communication area;

performing a read operation from an addressable space within a read communication area when said command indicates that data should be read from a designated register, said step of performing a read operation further including a step of mapping said designated register to said addressable space within said read communication area; and

writing a data word which contains information corresponding to said command into an addressable space within said write communication area and signaling a digital signal processor when said command indicates that said digital signal processor should be interrupted, said digital signal processor responsive to said signal by using said data word to determine which operation to perform, said digital signal processor writing a result of said operation into an addressable space within said read communication area.

2. The method of claim 1, wherein said step of performing a write operation further includes obtaining said data from said command.

3. The method of claim 1, wherein said step of performing a write operation further includes obtaining said data from a system memory.

4. The method of claim 1, further including a step of presenting data to said device by presenting data from said read communication area.

5. The method of claim 1, further including a step of synchronizing the presentation of data to said device from more than one source by providing a zeroth read area and a first read area within said read communication area, said zeroth read area for presenting data to said device from a first stream of execution, and said first read area for presenting data to said device from a second stream of execution.

6. The method of claim 5, wherein said second stream of execution is provided by said digital signal processor.

7. The method of claim 1, further including the steps of:

forming a zeroth read area and a first read area within said read communication area; and

presenting data to a device by presenting data from said zeroth read communication area, while said digital signal processor is also presenting data to said device from said first read communication area.

8. The method of claim 1, further including the steps of:

forming a zeroth read area and a first read area within said read communication area; and

presenting data to a device by presenting data from said first read communication area, while said digital signal processor is also presenting data to said device from said zeroth read communication area.

9. The method of claim 1, wherein said command complies with a common device command interface standard.

10. The method of claim 9, wherein said common device command interface complies with the Sound Blaster device command interface.

11. The method of claim 1, wherein said data word includes a request field, a read/write field, a channel field, an address field, and a data field.

12. The method of claim 11, further including a step of setting a bit within said request field to indicate that said data field contains valid data.

13. The method of claim 11, further including a step of clearing a bit within said request field to indicate that it has read or processed data with said data field.

14. The method of claim 11, further including a step of setting a bit within said read/write field to indicate a write command.

15. The method of claim 11, further including a step of clearing a bit within said read/write field to indicate a read command.

16. The method of claim 11, further including a step of setting a bit within said channel field to indicate which one of said zeroth or first read areas are to be used to emulate a plurality of audio-output registers.

17. The method of claim 11, further including a step of setting a bit value within said address field to indicate which one of a plurality of addressable registers are to be mapped.

18. The method of claim 1, further including a step of presenting data within said read communication area to said device.

19. The method of claim 1, further including the steps of:

providing an internal memory store and DMA device;

coupling a system bus to said DMA device; and

coupling an external memory store to said system bus.

20. A method for emulating a sound board, the method comprising the steps of:

receiving a command from a device;

performing a write operation into an addressable space within a write communication area when said command indicates that data should be written into a designated register, said step of performing a write operation further including a step of mapping said designated register with said space within said write communication area;

performing a read operation from an addressable space within a read communication area when said command indicates that data should be read from a designated register, said step of performing a read operation further including a step of mapping said designated register with said space within said read communication area;

writing a data word which contains information corresponding to said command into an addressable space within said write communication area and signaling a digital signal processor when said command indicates that said digital signal processor should be interrupted, said digital signal processor responsive to said signal by using said data word to determine which operation to perform, said digital signal processor writing a result of said operation into an addressable space within said read communication area;

synchronizing the presentation of data to said device from more than one source by providing a zeroth read area and a first read area within said read communication area, said zeroth read area for presenting data to said device from a first stream of execution, and said first read area for presenting data to said device from a second stream of execution.