Method for producing a semiconductor layer of SiC of the 3C-polytype and a semiconductor device having an insulator between a carrier and the active semiconductor layer

• US 5,798,293 A
• Filed: 02/25/1997
• Issued: 08/25/1998
• Est. Priority Date: 01/27/1997
• Status: Expired due to Fees

• Current Assignee: ABB Research Ltd. (ABB Ltd.)
• Original Assignee: ABB Research Ltd. (ABB Ltd.)
• Inventors: Harris, Christopher
• Primary Examiner(s): Niebling, John
• Assistant Examiner(s): Booth, Richard A.
• Application Number:
  US08/804,685
• Time in Patent Office: 546 Days
• Field of Search: 438/455, 438/459, 438/931
• US Class Current: 438/459
• CPC Class Codes: H01L 21/76256 using silicon etch back techniques, e.g. BESOI, ELTRAN
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: Y10S 438/931 Silicon carbide semiconductor

Abstract

In a method for producing a semiconductor layer (8) of SiC of the 3C-polytype on top of a semiconductor substrate layer (6) the wafer-bonding technique is utilised. Two amorphous layers are placed face to face and bonded by heating them, and the piece so obtained is annealed at such a high temperature that the material of the amorphous layers is allowed to flow for relaxing a 3C-SiC-layer (4) on top thereof. A second layer (8) of 3C-SiC is after that epitaxially regrown on top of said relaxed 3C-SiC-layer.

Claims

1. A method for producing a semiconductor layer of SiC of the 3C-polytype on top of a semiconductor substrate layer, comprising the steps of:

1) growing a buffer layer (1) on a first substrate layer (2) of a first material and a layer (3) of 3C-SiC on top of the buffer layer,

2) forming a first amorphous layer (4) on top of the layer of 3C-SiC,

3) forming a second amorphous layer (5) of the same material as the first amorphous layer on top of a second substrate layer (6) of a second material,

4) placing the upper surfaces of said amorphous layers (4,

     5) carried by said two substrate layers (2,

     6) face to face and bonding thereof by heating them for forming a single piece,

5) removing said first substrate layer (2) and the buffer layer (1) from said piece by etching,

6) annealing said piece at such a high temperature that the material of the amorphous layers (4,

     5) undergoes viscous flow for relaxing said 3C-SiC-layer (3) for forming a surface layer of a substrate onto which 3C-SiC may be epitaxially grown,

7) epitaxially regrowing a second layer (8) of 3C-SiC on top of said relaxed 3C-SiC-layer (3),

said steps

     1)-7) being carried out in the order mentioned except for the removal of the buffer layer, which may be carried out before step

     6) or after step

     6) but before step

     7).

2. A method according to claim 1, characterized in that said first material forming said first substrate layer (2) is Si.

3. A method according to claim 1, characterized in that the second material forming the second substrate layer (6) is Si.

4. A method according to claim 1, characterized in that said amorphous layers (4, 5) are formed of SiO₂.

5. A method according to claim 4, characterized in that the SiO₂ -layer (4) is in step 2) formed by oxidising a surface layer of the layer (3) of 3CSiC.

6. A method according to claim 4, characterized in that said SiO₂ -layer (5) is in step 3) formed by oxidising a surface layer of said second substrate layer (6).

7. A method according to any of claim 1, characterized in that said amorphous layers (4, 5) are formed by deposition of AlN on top of the layer (3) of 3C-SiC in step 2) and on top of the second substrate layer (6) in step 3).

8. A method according to any of claim 1, characterized in that said layers (3, 8) of 3C-SiC are in steps 1) and 7) grown by Chemical Vapour Deposition at a temperature below 1500°

C.

9. A method according to any of claim 1, characterized in that after step 1) and before step 2) the surface of said 3C-SiC-layer (3) is cleaned for making it substantially particle-free.

10. A method according to claim 1, characterized in that the annealing to relax the original 3C layer takes place at a temperature below 1450°

C.