Automatic differential absolute time delay equalizer

  • US 5,828,699 A
  • Filed: 01/30/1997
  • Issued: 10/27/1998
  • Est. Priority Date: 01/30/1997
  • Status: Expired due to Term
First Claim
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1. A method of reducing an electrical path length difference between two electromagnetic signal paths comprising the steps of:

  • (a) converting an electrical path length difference between two electromagnetic signal paths to a multi-bit digital signal; and

    (b) selectively inserting one or more time delay circuits into one of the two electromagnetic signal paths using the bits in the multi-bit digital signal to reduce the electrical path length difference, each of the bits for selecting one of the time delay circuits.

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