Method and apparatus for updating flash memory resident firmware through a standard disk drive interface

• US 5,835,933 A
• Filed: 02/19/1993
• Issued: 11/10/1998
• Est. Priority Date: 02/19/1993
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Wells, Steven E., Garner, Richard, Kendall, Terry L., Brown, Dave M., Kynett, Virgil Niles
• Primary Examiner(s): Swann, Tod R.
• Assistant Examiner(s): Tran, Denise
• Application Number:
  US08/019,766
• Time in Patent Office: 2,090 Days
• Field of Search: 395/430, 395/800.37, 365/185.22, 365/185.29, 365/185.33, 365/218, 365/185.09, 711/102-103, 371/10.2, 371/21.1
• US Class Current: 711/103
• CPC Class Codes: G06F 3/0607 by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
• CPC Class Codes: G06F 3/0632 by initialisation or re-initialisation of storage systems
• CPC Class Codes: G06F 3/0676 Magnetic disk device
• CPC Class Codes: G06F 8/65 Updates security arrangements therefor G06F21/57

Abstract

A method for updating the content of EEPROM memory used for controlling processes run on a microprocessor used to control the operations of a long term memory array which includes moving an update process stored in the EEPROM memory to a random access memory associated with the microprocessor; and then using the update process stored in random access memory for erasing the contents of the EEPROM memory, and furnishing data to the microprocessor on a sector by sector basis from a host computer through an interface used by the microprocessor to provide data to the long term memory array. The data furnished by the host is written sector by sector to the EEPROM memory until the EEPROM memory has been updated.

Claims

1. A method for updating an EEPROM memory which stores processes run on a microprocessor used to control operations of a long term memory array, the method comprising:

writing, in response to an update command of a host processor, an update process stored in the EEPROM memory to a random access memory associated with the microprocessor; and

using the update process stored in random access memory for

erasing the EEPROM memory

furnishing a predetermined amount of data to the microprocessor from a host processor through a standard disk drive interface, wherein the host processor provides other data to the long term memory array via the standard disk drive interface as if the long term memory array were a standard disk drive,

writing the predetermined amount of data to the EEPROM memory,

continuing the furnishing of a predetermined amount of data to the microprocessor and the writing of the predetermined amount of data to the EEPROM memory until the EEPROM memory has been updated, and resetting the microprocessor and the host processor after the EEPROM memory has been updated.

2. A method for updating the content of EEPROM memory as claimed in claim 1 in which the furnishing of a predetermined amount of data to the microprocessor comprises furnishing a sector of data from the host processor to a buffer, and the writing of the predetermined amount of data to the EEPROM memory comprises writing the sector of data from the buffer to the EEPROM memory.

3. A method for updating the content of EEPROM memory as claimed in claim 1 in which the writing of an update process stored in the EEPROM memory to a random access memory associated with the microprocessor comprises reading the update process and all processes used by the update process from the EEPROM memory, and writing the processes read from the EEPROM memory to the random access memory associated with the microprocessor.

4. A method for updating the content of EEPROM memory as claimed in claim 1 in which the update process stored in random access memory is also for verifying successful erasure of the EEPROM and furnishing the predetermined amount of data to the microprocessor only if erasure of the EEPROM was successful.