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Electronic carillon system utilizing interpolated fractional address DSP algorithm

  • US 5,837,914 A
  • Filed: 08/22/1996
  • Issued: 11/17/1998
  • Est. Priority Date: 08/22/1996
  • Status: Expired due to Fees
First Claim
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1. An electronic carillon system, comprising:

  • (A) a digital signal processor (DSP);

    (B) memory means, operatively coupled to said DSP, for memorizing program code for controlling the operation of the DSP in carrying out pre-programmed algorithms; and

    (C) output means, operatively coupled to said DSP, for converting the output of the DSP into audible sound;

    wherein said system is programmed, via said DSP and program code, to construct bell sounds spanning all notes within a prescribed number of octaves on the basis of a limited number of pre-recorded samples of notes within a single octave.

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