Active pixel sensor integrated with a pinned photodiode

• US 5,904,493 A
• Filed: 12/20/1996
• Issued: 05/18/1999
• Est. Priority Date: 04/13/1995
• Status: Expired due to Term

• Current Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Original Assignee: Eastman Kodak Company
• Inventors: Stevens, Eric G., Guidash, Robert M., Lee, Paul P., Lee, Teh-Hsuang
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): COLEMAN, WILLIAM D
• Application Number:
  US08/771,560
• Time in Patent Office: 879 Days
• Field of Search: 438/57, 438/59, 438/60, 438/73, 438/78, 257/291, 257/292
• US Class Current: 438/57
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14645 Colour imagers
• CPC Class Codes: H01L 27/14689 MOS based technologies
• CPC Class Codes: H01L 27/14831 Area CCD imagers

Abstract

The optimization of two technologies (CMOS and CCD) wherein a pinned photodiode is integrated into the image sensing element of an active pixel sensor. Pinned photodiodes are fabricated with CCD process steps into the active pixel architecture. Charge integrated within the active pixel pinned photodiode is transferred into the charge sensing node by a transfer gate. The floating diffusion is coupled CMOS circuitry that can provide the addressing capabilities of individual pixels. Alternatively, a buried channel photocapacitor can be used in place of the pinned photodiode.

Claims

1. A method of forming an active pixel sensor comprising the steps of:

providing CMOS control circuitry operatively coupled through a transfer gate formed on a surface of the sensor to a pinned photodiode formed at the surface.

2. The method of claim 1 wherein the CMOS control circuitry is operatively coupled to an array of pinned photodiodes, each pinned photodiode being operatively coupled to the CMOS control circuitry through a transfer gate formed on the surface.

3. The method of claim 1 wherein charge is transferred from the pinned photodiode to a floating diffusion area under control of the transfer gate such that the pinned photodiode, the transfer gate and the charge sensing means acts as, respectively, the source, the gate and the drain of a MOSFET.

4. The method of claim 3 wherein the CMOS control circuitry is operatively coupled to the charge sensing means.

5. The method of claim 1 wherein the step of providing further comprises providing amplification means for applying charge from the pinned photodiode to the CMOS control circuitry in a predetermined manner.

6. The method of claim 1 wherein the step of providing further comprises providing a plurality of pinned photodiode elements formed into an array.

7. The method of claim 1 wherein the step of providing further comprises providing the pinned photodiode being operatively coupled to at least one NMOS control circuit.

8. The method of claim 1 wherein the step of providing further comprises providing the pinned photodiode being operatively coupled to at least one PMOS control circuit.

14. The method of claim 1 wherein the step of providing further comprises providing a reset transistor operatively coupled to a charge sensing node and the pinned photodiode.

9. A method for integrating a pinned photodiode into an active pixel sensor comprising the steps of:

providing a semiconductor material of a first conductivity type with a series of masking layers including at least one conductive layer on a major surface of the substrate;

forming at least one well of a second conductivity type that is opposite the first conductivity type in an area where control circuitry is to be built, and forming an active area over the substrate;

patterning at least one transfer gate along the surface of the substrate and a series of local interconnections;

forming structures for a charge sensing means, including, creating patterns representing a first set of sources and drains for a predetermined set of transistors, including at least one drain for each of the transfer gates;

introducing a second conductivity type opposite the first conductivity type so as to create the first set of sources and drains;

patterning at least one image sensing area adjacent to the transfer gate;

introducing within at least the image sensing area a material of the second conductivity type to create a photodiode;

introducing at least on top of the photodiode a pinning layer comprising the first conductivity type;

creating patterns representing a second set of sources and drains for a predetermined set of transistors;

introducing the first conductivity type to create the second set of sources and drains; and

creating a predetermined set of contacts on first and second sets of sources and drains.

10. The method of claim 9 further comprising the step of providing a transfer region of the first conductivity type along the surface of the transfer gate.

11. The method of claim 10 wherein the step of introducing on top of the photodiode a pinning layer further comprises introducing the first conductivity type such that it has at least one edge that is self aligned with the transfer region and creates a region of the first conductivity type at the surface of the second conductivity type.

12. The method of claim 9 wherein the step of forming structures further comprises the drain being a floating diffusion region.

13. The method of claim 9 wherein the steps relating to introducing the first and second sets of sources and drains are reversed.