Desktop computer system having compressed suspend to hardfile

• US 5,925,129 A
• Filed: 06/07/1995
• Issued: 07/20/1999
• Est. Priority Date: 07/26/1993
• Status: Expired due to Term

• Current Assignee: Lenovo PC International Limited (Lenovo Group Ltd.)
• Original Assignee: International Business Machines Corporation
• Inventors: Pancoast, Steven Taylor, Crump, Dwayne Thomas, Combs, James Lee
• Primary Examiner(s): Harvey, Jack B.
• Assistant Examiner(s): Seto, Jeffrey K.
• Application Number:
  US08/472,207
• Time in Patent Office: 1,504 Days
• Field of Search: 395/750, 395/575, 395/700, 341/51, 341/50, 341/59
• US Class Current: 713/300
• CPC Class Codes: G06F 9/4418 Suspend and resume; Hibernate and awake

Abstract

A desktop computer system having the capability to suspend and resume the state of the computer system. The suspended system state is saved to the system hard file such that system power may be removed, effectively allowing a system suspend requiring no power from the power supply.

Claims

1. A method for saving the state of a computer system which has:

(a) a power supply having circuitry for selectively providing system power from an external source to the computer system, the power supply having a first power supply state and a second power supply state;

(b) an electromechanical non-volatile storage device;

(c) volatile memory for storing memory data; and

(d) volatile registers for storing register data;

the method comprising the steps of;

(1) responsive to a preselected suspend event, reversibly altering the memory and register data;

(2) writing the reversibly altered memory and register data to the electromechanical non-volatile storage device to allow the state of the computer system to be restored therefrom; and

(3) thereafter causing the power supply to change from the first power supply state to the second power supply state.

2. A method for saving the state of a computer system according to claim 1 wherein said steps of (1) reversibly altering the memory and register data and (2) writing the reversibly altered memory and register data to the electromechanical non-volatile storage device are performed sequentially.

3. A method for saving the state of a computer system according to claim 1 wherein said steps of (1) reversibly altering the memory and register data and (2) writing the reversibly altered memory and register data to the electromechanical non-volatile storage device are performed at least in part in a time-multiplexed fashion.

4. A method for saving the state of a computer system according to claim 1, wherein said steps of (1) reversibly altering the memory and register data and (2) writing the reversibly altered memory and register data to the electromechanical non-volatile storage device are performed such that a portion of data is reversibly altered and stored to a first data buffer and then at least in part in a time-multiplexed fashion the reversibly altered portion of data is written from the first data buffer to the electromechanical non-volatile storage device while another portion of data is reversibly altered and stored to a second data buffer, and wherein said steps alternate with respect to which of the data buffers is used.

5. A method for saving the state of a computer system according to claim 4 wherein said data buffers are each about eight kilobytes in length.

6. A method for saving the state of a computer system according to claim 1 wherein said step of reversibly altering the memory and register data is performed at least in part in the foreground and said step of writing the reversibly altered memory and register data to the electromechanical non-volatile storage device is performed at least in part in the background by an interrupt-driven routine.

7. A method for saving the state of a computer system according to claim 1 wherein said step of reversibly altering the memory and register data comprises the step of compressing the memory and register data using a run length encoding method.

8. A method for saving the state of a computer system according to claim 1 wherein said computer system has:

(a) a CPU having CPU registers for storing CPU register data, and CPU cache memory for storing CPU cache data;

(b) system memory for storing system data;

(c) system cache memory for storing system cache data; and

(d) a video subsystem having a video memory for storing video data, and video registers for storing video register data; and

(1) wherein said memory data comprises the CPU cache data, the system data, the system cache data, and the video data; and

(2) wherein the register data comprises the video register data and the CPU register data.

9. A method for saving the state of a computer system which has:

(a) a power supply having circuitry for selectively providing system power from an external source to the computer system, the power supply having a first power supply state and a second power supply state;

(b) an electromechanical non-volatile storage device;

(c) volatile memory for storing memory data; and

(d) volatile registers for storing register data;

the method comprising the steps of;

(1) responsive to a preselected suspend event, reversibly altering at least one portion of the memory and register data;

(2) writing to the electromechanical non-volatile storage device the reversibly altered memory and register data and at least a portion of any remaining unaltered memory and register data to allow the state of the computer system to be restored therefrom;

(3) thereafter causing the power supply to change from the first power supply state to the second power supply state.

10. A method for saving the state of a computer system according to claim 9 wherein said steps of (1) reversibly altering at least one portion of the memory and register data and (2) writing to the electromechanical non-volatile storage device the reversibly altered memory and register data and at least a portion of any remaining unaltered memory and register data are performed at least in part in a time multiplexed fashion.

11. A method for saving the state of a computer system according to claim 9 wherein said steps of (1) reversibly altering at least one portion of the memory and register data and (2) writing to the electromechanical non-volatile storage device the reversibly altered memory and register data and at least a portion of any remaining unaltered memory and register data are performed such that a portion of data is reversibly altered and stored to a first data buffer and then at least in part in a time-multiplexed fashion the reversibly altered portion of data is written from the first data buffer to the electromechanical non-volatile storage device while another portion of data is reversibly altered and stored to a second data buffer, and wherein said steps alternate with respect to which of the data buffers is used.

12. A method for saving the state of a computer system according to claim 9 wherein said step of reversibly altering at least one portion of the memory and register data is performed at least in part in the foreground and said step of writing to the electromechanical non-volatile storage device the reversibly altered memory and register data and at least a portion of any remaining unaltered memory and register data is performed at least in part in the background by an interrupt-driven routine.

13. A method for saving the state of a computer system according to claim 9 wherein said step of reversibly altering at least one portion of the memory and register data comprises the step of compressing the at least one portion of the memory and register data using a run length encoding method.

14. A method for saving the state of a computer system according to claim 9 wherein said computer system has:

(a) a CPU having CPU registers for storing CPU register data, and CPU cache memory for storing CPU cache data;

(b) system memory for storing system data;

(c) system cache memory for storing system cache data; and

(d) a video subsystem having a video memory for storing video data, and video registers for storing video register data; and

(1) wherein said memory data comprises the CPU cache data, the system data, the system cache data, and the video data; and

(2) wherein the register data comprises the video register data and the CPU register data.

15. A method for saving the state of a computer system according to claim 14 wherein the video data is not reversibly altered before being written to said non-volatile storage device.

16. A desktop computer system for running an operating system and an application program, comprising:

(a) a CPU;

(b) a power supply having circuitry for selectively providing system power from an external source to said computer system, said power supply having a first power supply state and a second power supply state, said first power supply state being characterized by said power supply providing system power and auxiliary power to said computer system from said external source, and said second power supply state being characterized by said power supply not providing system power to said computer system from said external source and said power supply providing auxiliary power to said computer system from said external source;

(c) an electromechanical non-volatile storage device in circuit communication with said CPU;

(d) volatile system memory in circuit communication with said CPU and for storing memory data;

(e) volatile system registers in circuit communication with said CPU and for storing register data; and

(f) a control unit in circuit communication with said CPU and for selectively changing the state of said computer system from a normal operating state to a suspend state responsive to a preselected suspend event;

(1) said normal operating state being characterized by said power supply being in said first power supply state and said computer system being capable of executing the application program;

(2) said suspend state being characterized by the register data and the memory data being stored on said electromechanical non-volatile storage device and said power supply being in said second power supply state;

(3) said change from said normal operating state to said suspend state including said control unit responsive to said preselected suspend event;

(i) reversibly altering the memory and register data; and

(ii) writing the reversibly altered memory and register data to the electromechanical non-volatile storage device to allow the state of the computer system to be restored therefrom;

(4) said power supply changing between said power supply states responsive to said control unit; and

(5) said change from said normal operating state to said suspend state further including said control unit causing said power supply to change from said first power supply state to said second power supply state, respectively, responsive to said preselected suspend event.

17. A desktop computer system according to claim 16 wherein said control unit comprises a power management processor and code for execution by said CPU.

18. A desktop computer system according to claim 16 wherein said control unit (1) reversibly alters the memory and register data and (2) writes the reversibly altered memory and register data to the electromechanical non-volatile storage device at least in part in a time-multiplexed fashion.

19. A desktop computer system according to claim 16 wherein said control unit (1) reversibly alters the memory and register data and (2) writes the reversibly altered memory and register data to the electromechanical non-volatile storage device such that a portion of data is reversibly altered and stored to a first data buffer and then at least in part in a time-multiplexed fashion the reversibly altered portion of data is written from the first data buffer to the electromechanical non-volatile storage device while another portion of data is reversibly altered and stored to a second data buffer, and wherein said steps alternate with respect to which of the data buffers is used.

20. A desktop computer system according to claim 16 wherein said control unit reversibly alters the memory and register data at least in part in the foreground and writes the reversibly altered memory and register data to the electromechanical non-volatile storage device at least in part in the background by an interrupt-driven routine.

21. A desktop computer system according to claim 16 wherein said control unit reversibly alters the memory and register data by compressing the memory and register data using a run length encoding method.

22. A desktop computer system according to claim 16 wherein said control unit is further characterized by selectively changing the state of said computer system from the suspend state to the normal operating state responsive to at least one preselected resume event and wherein said control unit responsive to said preselected resume event:

(i) reads the reversibly altered memory and register data from the electromechanical non-volatile storage device;

(ii) reverses the alteration of the memory and register data; and

(iii) writes the memory data to the volatile system memory and writes the register data to the volatile system registers.

23. A desktop computer system according to claim 22 wherein said control unit (1) reverses the alteration of the memory and register data and (2) reads the reversibly altered memory and register data from the electromechanical non-volatile storage device at least in part in a time-multiplexed fashion.

24. A desktop computer system according to claim 22 wherein said control unit reverses the alteration of the memory and register data at least in part in the foreground and said control unit reads the reversibly altered memory and register data from the electromechanical non-volatile storage device at least in part in the background by an interrupt-driven routine.

25. A desktop computer system for running an operating system and an application program, the system comprising:

(a) a CPU;

(b) at least one electronic device in circuit communication with said CPU, said at least one electronic device having an associated device driver, said device driver capable of execution by said CPU to initialize said at least one electronic device into a known state that is different from the power-on state of said at least one electronic device.

(c) a power supply having circuitry for selectively providing system power from an external source to said computer system, said power supply having a first power supply state and a second power supply state;

(d) a non-volatile storage device in circuit communication with said CPU;

(e) volatile system memory in circuit communication with said CPU and for storing memory data;

(f) volatile system registers in circuit communication with said CPU and for storing register data;

(g) a control unit in circuit communication with said CPU for selectively changing the state of said computer system from a normal operating state to a suspend state responsive to a preselected suspend event, and for selectively changing the state of said computer system from the suspend state to the normal operating state responsive to at least one predetermined resume event; and

(h) a boot unit in circuit communication with said CPU and said control unit, said boot unit capable of execution by said CPU to perform at least a first predetermined resume boot task responsive to said at least one predetermined resume event;

(1) said normal operating state being characterized by said power supply being in said first power supply state and said computer system being capable of executing said application program responsive to user commands or to the operating system;

(2) said suspend state being characterized by the register data and the memory data being stored on said non-volatile storage device and said power supply being in said second power supply state;

(3) said change from said normal operating state to said suspend state including said control unit copying the memory data and the register data from said system memory and said system registers to said non-volatile storage device responsive to said preselected suspend event;

(4) said power supply changing between said power supply states responsive to said control unit;

(5) said change from said normal operating state to said suspend state further including said control unit causing said power supply to change from said first power supply state to said second power supply state, respectively, responsive to said preselected suspend event; and

(6) said first predetermined resume boot task including loading said device driver into said system memory and executing said device driver responsive to said at least one predetermined resume event, thereby initializing said at least one electronic device into the known state that is different from the power-on state of said at least one electronic device.

26. A desktop computer system according to claim 25 wherein:

(1) said change from said suspend state to said normal operating state including said control unit retrieving the memory data and the register data from non-volatile storage device responsive to said preselected resume event; and

(2) to the extent that execution of said device driver causes at least one portion of said device driver to reside in said system memory for further execution, that portion of said device driver residing in said system memory is overwritten by data retrieved from said non-volatile storage device.

27. A desktop computer system for running an operating system. and an application program, the system comprising:

(a) a CPU;

(b) a power supply having circuitry for selectively providing system power from an external source to said computer system, said power supply having a first power supply state and a second power supply state;

(c) a non-volatile storage device in circuit communication with said CPU;

(d) volatile system memory in circuit communication with said CPU and for storing memory data;

(e) volatile system registers in circuit communication with said CPU and for storing register data;

(f) a control unit in circuit communication with said CPU for selectively changing the state of said computer system from a normal operating state to a suspend state responsive to a preselected suspend event, and for selectively changing the state of said computer system from the suspend state to the normal operating state responsive to at least one predetermined resume event; and

(g) a boot unit in circuit communication with said CPU and said control unit, said boot unit capable of execution by said CPU to perform at least a first predetermined resume boot task responsive to said at least one predetermined resume event, said boot unit having associated therewith a plurality of device drivers capable of execution by said CPU, said device drivers initializing electronic devices into a known state that is different from the power-on state of said electronic devices and said plurality of device drivers being prioritized into at least one predetermined subset;

(1) said normal operating state being characterized by said power supply being in said first power supply state and said computer system being capable of executing said application program responsive to user commands or to the operating system;

(2) said suspend state being characterized by the register data and the memory data being stored on said non-volatile storage device and said power supply being in said second power supply state;

(3) said change from said normal operating state to said suspend state including said control unit copying the memory data and the register data from said system memory and said system registers to said non-volatile storage device responsive to said preselected suspend event;

(4) said power supply changing between said power supply states responsive to said control unit; and

(5) said change from said normal operating state to said suspend state further including said control unit causing said power supply to change from said first power supply state to said second power supply state, respectively, responsive to said preselected suspend event;

(6) said first predetermined resume boot task including loading said device drivers of said predetermined subset of device drivers into said system memory and executing said device drivers of said predetermined subset of device drivers.

28. A desktop computer system according to claim 27 wherein:

(1) said change from said suspend state to said normal operating state including said control unit retrieving the memory data and the register data from non-volatile storage device responsive to said preselected resume event; and

(2) to the extent that executing said device drivers of said predetermined subset of device drivers causes at least one portion of said executed device drivers to reside in said system memory for further execution, those portions of said executed device drivers residing in said system memory are overwritten by data retrieved from said non-volatile storage device.

29. A desktop computer system according to claim 27 wherein said device drivers are executed via a configuration file and said device drivers of said predetermined subset of device drivers are separated from other device drivers by a command in said configuration file.

30. A desktop computer system for running an operating system and an application program, comprising:

(a) a CPU;

(b) a power supply having circuitry for selectively providing system power from an external source to said computer system, said power supply having a first power supply state and a second power supply state, said first power supply state being characterized by said power supply providing system power and auxiliary power to said computer system from said external source, and said second power supply state being characterized by said power supply not providing system power to said computer system from said external source and said power supply providing auxiliary power to said computer system from said external source;

(c) an electromechanical non-volatile storage device in circuit communication with said CPU;

(d) volatile system memory in circuit communication with said CPU and for storing memory data;

(e) volatile system registers in circuit communication with said CPU and for storing register data; and

(f) a control unit in circuit communication with said CPU and for selectively changing the state of said computer system from a normal operating state to a suspend state responsive to a preselected suspend event;

(1) said normal operating state being characterized by said power supply being in said first power supply state and said computer system being capable of executing the application program;

(2) said suspend state being characterized by the register data and the memory data being stored on said electromechanical non-volatile storage device and said power supply being in said second power supply state;

(3) said change from said normal operating state to said suspend state including said control unit responsive to said preselected suspend event;

(i) reversibly altering at least one portion of the memory and register data; and

(2) writing to the electromechanical non-volatile storage device the reversibly altered memory and register data and at least a portion of any remaining unaltered memory and register data to allow the state of the computer system to be restored therefrom;

(4) said power supply changing between said power supply states responsive to said control unit; and

(5) said change from said normal operating state to said suspend state further including said control unit causing said power supply to change from said first power supply state to said second power supply state, respectively, responsive to said preselected suspend event.

31. A desktop computer system according to claim 30 wherein said control unit (1) reversibly alters at least one portion of the memory and register data and (2) writes to the electromechanical non-volatile storage device the reversibly altered memory and register data and at least a portion of any remaining unaltered memory and register data at least in part in a time-multiplexed fashion.

32. A desktop computer system according to claim 30 wherein said control unit (1) reversibly alters at least one portion of the memory and register data and (2) writes to the electromechanical non-volatile storage device the reversibly altered memory and register data and at least a portion of any remaining unaltered memory and register data such that a portion of data is reversibly altered and stored to a first data buffer and then at least in part in a time-multiplexed fashion the reversibly altered portion of data is written from the first data buffer to the electromechanical non-volatile storage device while another portion of data is reversibly altered and stored to a second data buffer, and wherein said steps alternate with respect to which of the data buffers is used.

33. A desktop computer system according to claim 30 wherein said control unit reversibly alters at least one portion of the memory and register data at least in part in the foreground and writes to the electromechanical non-volatile storage device the reversibly altered memory and register data at least in part in the background by an interrupt-driven routine.

34. A desktop computer system according to claim 30 wherein said control unit reversibly alters at least one portion of the memory and register data by compressing the at least one portion of the memory and register data using a run length encoding method.

35. A desktop computer system according to claim 30 wherein said control unit is further characterized by selectively changing the state of said computer system from the suspend state to the normal operating state responsive to at least one preselected resume event and wherein said control unit responsive to said preselected resume event:

(i) reads from the electromechanical non-volatile storage device the reversibly altered memory and register data and at least a portion of any remaining unaltered memory and register data;

(ii) reverses the alteration of the at least one portion of the memory and register data; and

(iii) writes the memory data to the volatile system memory and writes the register data to the volatile system registers.

36. A desktop computer system according to claim 35 wherein said control unit (1) reverses the alteration of the at least one portion of the memory and register data and (2) reads the reversibly altered memory and register data from the electromechanical non-volatile storage device at least in part in a time-multiplexed fashion.

37. A desktop computer system according to claim 35 wherein said control unit reverses the alteration of the at least one portion of the memory and register data at least in part in the foreground and said control unit reads the reversibly altered memory and register data from the electromechanical non-volatile storage device at least in part in the background by an interrupt-driven routine.

38. A method for restoring the state of a computer system which has:

(a) a power supply having circuitry for selectively providing system power from an external source to the computer system, the power supply having a first power supply state and a second power supply state;

(b) an electromechanical non-volatile storage device;

(c) volatile memory for storing memory data; and

(d) volatile registers for storing register data;

the method comprising the steps of;

(1) responsive to a preselected resume event, causing the power supply to change from the first power supply state to the second power supply state;

(2) reading reversibly altered memory and register data from the electromechanical non-volatile storage device;

(3) reversing the alteration of the memory and register data;

(4) writing the memory data to the volatile system memory; and

(5) writing the register data to the volatile system registers.

39. A method for restoring the state of a computer system according to claim 38 wherein said steps of (1) reversing the alteration of the memory and register data and (2) reading reversibly altered memory and register data from the electromechanical non-volatile storage device are performed at least in part in a time-multiplexed fashion.

40. A method for restoring the state of a computer system according to claim 38 wherein said step of reversing the alteration of the memory and register data is performed at least in part in the foreground and said step of reading the reversibly altered memory and register data from the electromechanical non-volatile storage device is performed at least in part in the background by an interrupt-driven routine.

41. A method for restoring the state of a computer system which has:

(a) a power supply having circuitry for selectively providing system power from an external source to the computer system, the power supply having a first power supply state and a second power supply state;

(b) an electromechanical non-volatile storage device;

(c) volatile memory for storing memory data; and

(d) volatile registers for storing register data;

the method comprising the steps of;

(1) responsive to a preselected resume event, causing the power supply to change from the first power supply state to the second power supply state;

(2) reading from the electromechanical non-volatile storage device reversibly altered memory and register data;

(3) reading from the electromechanical non-volatile storage device unaltered memory and register data;

(4) reversing the alteration of the reversibly altered memory and register data;

(5) writing the memory data to the volatile system memory; and

(6) writing the register data to the volatile system registers.

42. A method for restoring the state of a computer system according to claim 41 wherein said steps of (1) reversing the alteration of the reversibly altered memory and register data and (2) reading from the electromechanical non-volatile storage device the reversibly altered memory and register data are performed at least in part in a time-multiplexed fashion.

43. A method for restoring the state of a computer system according to claim 41 wherein said step of reversing the alteration of the reversibly altered memory and register data is performed at least in part in the foreground and said step of reading from the electromechanical non-volatile storage device the reversibly altered memory and register data is performed at least in part in the background by an interrupt-driven routine.