Process for fabricating low leakage current electrode for LPCVD titanium oxide films

• US 5,930,584 A
• Filed: 04/30/1996
• Issued: 07/27/1999
• Est. Priority Date: 04/10/1996
• Status: Expired due to Fees

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Chen, Tsai-Fu, Sun, Shi-Chung
• Primary Examiner(s): Mach, D. Margaret M.
• Application Number:
  US08/640,085
• Time in Patent Office: 1,183 Days
• Field of Search: 938/785, 938/396, 938/393, 938/653, 938/656, 938/3, 938/240
• US Class Current: 438/3
• CPC Class Codes: C23C 16/0218 in a reactive atmosphere C23C16/0227 takes precedence
• CPC Class Codes: C23C 16/405 of refractory metals or yttrium
• CPC Class Codes: C23C 16/56 After-treatment
• CPC Class Codes: H01L 21/02183 the material containing tantalum, e.g. Ta2O5
• CPC Class Codes: H01L 21/02271 deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition H01L21/02266 takes precedence
• CPC Class Codes: H01L 21/02337 treatment by exposure to a gas or vapour
• CPC Class Codes: H01L 21/31604 Deposition from a gas or vapour H01L21/31691, H01L21/31695 take precedence

Abstract

A process for fabricating electrodes for the capacitor dielectric of semiconductor memory devices with low leakage current characteristics is disclosed. The process comprises the steps of first depositing a titanium oxide film over a semiconductor silicon substrate. The deposited titanium oxide film is then annealed. A layer of tungsten nitride top electrode is then deposited on the annealed titanium oxide film. A second annealing procedure is then conducted to simulate post electrode high temperature process.

Claims

1. A process for fabricating electrodes for capacitor dielectrics of semiconductor memory devices having low leakage current characteristics, said process comprising the steps of:

preparing a semiconductor silicon substrate;

depositing a titanium oxide film, the film being substantially free of dissimilar metals, over said semiconductor silicon substrate;

annealing said deposited titanium oxide film;

depositing a layer of top electrode on said annealed titanium oxide film so as to overlie said film; and

subjecting a high temperature environment.

2. The process of claim 1, wherein said semiconductor silicon substrate is an n⁺ type silicon substrate, or an n⁺ type polysilicon substrate.

3. The process of claim 1, wherein said titanium oxide film is TiO₂ film.

4. The process of claim 3, wherein said TiO₂ film has a thickness of about 10 to 20 nm.

5. The process of claim 4, wherein said TiO₂ film is deposited in a cold-wall low-pressure chemical vapor deposition (LPCVD) reactor.

6. The process of claim 5, wherein said TiO₂ film is deposited using tetra-isopropyl-titanate (TPT, Ti(i.OC₃ H₇)₄) vapor and oxygen as the ambient atmosphere.

7. The process of claim 6, wherein said TiO₂ film is deposited at a temperature of about 350°

C.

8. The process of claim 3, wherein said annealing of said deposited TiO₂ film is conducted in a dry O₂ atmosphere.

9. The process of claim 8, wherein said annealing of said deposited TiO₂ film is conducted at a temperature of about 800°

C.

10. The process of claim 9, wherein said annealing of said deposited TiO₂ film is conducted for about 30 minutes.

11. The process of claim 3, wherein said top electrode layer is deposited on said TiO₂ film by a reactive sputtering method.

12. The process of claim 3, wherein said top electrode layer is deposited on said TiO₂ film by an electron beaming method.

13. The process of claim 3, wherein said top electrode layer is deposited on said TiO₂ film by a chemical vapor deposition (CVD) method.

14. The process of claim 3, wherein said top electrode layer is deposited on said TiO₂ film by a reactive sputtering method, and said top electrode layer is deposited utilizing a metal nitride material.

15. The process of claim 14, wherein said metal nitride material is tungsten nitride.

16. The process of claim 3, wherein said top electrode layer is deposited on said TiO₂ film by an electron beaming method, and said top electrode layer is deposited utilizing a metal nitride material.

17. The process of claim 16, wherein said metal nitride material is tungsten nitride.

18. The process of claim 3, wherein said top electrode layer is deposited on said TiO₂ film by a chemical vapor deposition method, and said top electrode layer is deposited utilizing a metal nitride material.

19. The process of claim 18, wherein said metal nitride material is tungsten nitride.

20. The process of claim 1, wherein the step of subjecting said high temperature environment is in an N₂ atmosphere.

21. The process of claim 20, wherein said high temperature environment is a t a temperature of about 400-800°

C.

22. The process of claim 21, wherein the step of subjecting said high temperature environment is conducted for about 30 minutes.

23. A process for fabricating electrodes for capacitor dielectrics of semiconductor memory devices having low leakage current characteristics, said process comprising the steps of:

preparing a semiconductor silicon substrate;

depositing a titanium oxide film, the film being substantially free of dissimilar metals, over said semiconductor silicon substrate;

annealing said deposited titanium oxide film;

depositing a layer of tungsten nitride top electrode on said annealed titanium oxide film so as to overlie said film; and

subjecting a high temperature of about 400-800°

C. in an N₂ environment for about 30 minutes.