Chip temperature protection using delay lines

• US 5,943,206 A
• Filed: 08/19/1997
• Issued: 08/24/1999
• Est. Priority Date: 08/19/1997
• Status: Expired due to Term

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Crayford, Ian
• Primary Examiner(s): Medley, Sally C.
• Application Number:
  US08/914,263
• Time in Patent Office: 735 Days
• Field of Search: 361/103, 361/93, 361/1, 361/25, 327/262, 327/276
• US Class Current: 361/103
• CPC Class Codes: H02H 5/044 using a semiconductor device to sense the temperature

Abstract

A temperature protection device determines the operating temperature of an integrated circuit chip. The temperature monitor includes a delay line made up of serially connected delay cells. The propagation time of a signal through the delay cells is determined and this value is correlated to chip temperature. The chip temperature is compared to an operating range for the chip, and if the value is outside a predetermined range, an alert signal is produced.

Claims

1. An integrated circuit temperature protection system comprising:

a delay line contained on a chip, the delay line comprising a plurality of serially connected delay cells;

a counter coupled to the delay line for measuring propagation time of a signal through the delay line;

a temperature detector coupled to the counter for correlating the signal propagation time to a chip temperature and for generating a signal representing the chip temperature; and

a comparator coupled to the temperature detector for comparing the chip temperature to a predetermined operating range.

2. The integrated circuit temperature protection system of claim 1, wherein each delay cell comprises a pair of serially connected inverters.

3. The integrated circuit temperature protection system of claim 1, wherein each delay cell comprises a repeating pattern of logic gates.

4. The integrated circuit temperature protection system of claim 1, wherein the comparator is operative for outputting a second signal indicating that the chip temperature is outside the predetermined operating range.

5. The integrated circuit temperature protection system of claim 4, wherein the second signal is output to devices which communicate with the chip.

6. The integrated circuit temperature protection system of claim 4, wherein the second signal is output to a control system.

7. The integrated circuit temperature protection system of claim 4, wherein the second signal is output to a device which shuts down or suspends operation of the chip.

8. The integrated circuit temperature protection system of claim 4, wherein the second signal is output to a clock generator.

9. The integrated circuit temperature protection system of claim 1, wherein the comparator is operative for outputting a second signal when the chip temperature is within the predetermined operating range.

10. The integrated circuit temperature protection system of claim 1, wherein the operating range has an upper limit and a lower limit, and the comparator is operative for outputting a second signal when the chip temperature is within a predetermined value of either the upper limit or lower limit.

11. A method of protecting an integrated circuit comprising the steps of:

a) passing a signal through N serially connected delay cells;

b) measuring propagation time of the signal through the N cells;

c) correlating the propagation time to a chip temperature and outputting a signal representing the chip temperature; and

d) comparing the chip temperature to a predetermined range of temperature values.

12. The method of claim 11, further comprising the step of:

e) outputting a signal when the chip temperature is outside the predetermined range.

13. The method of claim 11, further comprising the step of:

e) outputting a signal when the chip temperature is within the predetermined range.

14. An integrated circuit temperature protection system comprising:

a delay line contained on a chip, the delay line comprising a plurality of serially connected delay cells wherein propagation delay time of the delay cells varies with temperature;

a reference clock coupled to the delay line for supplying an input signal to the delay line;

a counter coupled to the delay line for measuring propagation time of a signal through the delay line;

a temperature detector coupled to the counter for correlating the signal propagation time to a chip temperature and for generating a signal representing the chip temperature; and

a comparator coupled to the temperature detector for comparing the chip temperature to a predetermined operating range, wherein the comparator is operative for outputting a first signal indicating that the chip temperature is outside the predetermined operating range, the operating range having an upper limit and a lower limit.

15. The integrated circuit temperature protection system of claim 14, wherein each delay cell comprises a pair of serially connected inverters.

16. The integrated circuit temperature protection system of claim 14, wherein the comparator is operative for outputting a second signal when the chip temperature is within the predetermined operating range.

17. The integrated circuit temperature protection system of claim 14, wherein the comparator is operative for outputting a second signal when the chip temperature is within a predetermined value of either the upper limit or lower limit.

18. The integrated circuit temperature protection system of claim 14, wherein the first sign al is output to devices which communicate with the chip.

19. The integrated circuit temperature protection system of claim 14, wherein the first signal is output to a control system.

20. The integrated circuit temperature protection system of claim 14, wherein the first signal is output to a device which shuts down or suspends operation of the chip.

21. The integrated circuit temperature protection system of claim 14, wherein the first signal is output to a device which adjusts the timing on the chip.

22. An integrated circuit temperature protection system comprising:

a delay line comprising a series of repetitive delay elements;

a first device for measuring signal propagation delay through the delay line and for computing the delay of an individual delay element;

a temperature detector coupled to the first device for correlating the delay of an individual delay element to a chip temperature and for generating a signal representing the chip temperature;

control logic coupled to the temperature detector for generating a control signal based on the chip temperature; and

a clock generator configured to generate a clock signal, based on the control signal.

23. The integrated circuit temperature protection system of claim 22, wherein the control logic is configured to turn off other systems or integrated circuit functions.

24. The integrated circuit temperature protection system of claim 22, wherein the control logic is configured to turn on other systems or integrated circuit functions.

25. The integrated circuit measurement system of claim 22, wherein the control logic is configured to adjust the operating speed of an internal circuit parameter or external device.