Method and apparatus for amplifying a signal to produce a latched digital signal

CAFC
  • US 5,943,274 A
  • Filed: 02/02/1998
  • Issued: 08/24/1999
  • Est. Priority Date: 02/02/1998
  • Status: Expired due to Term
First Claim
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1. An apparatus for use as an output stage of a memory device, the apparatus comprising:

  • a timing circuit;

    a differential amplifier responsive to the timing circuit;

    an impedance control circuit;

    a level converter responsive to the differential amplifier and the impedance control circuit; and

    a clock-free latch responsive to the level converter.

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